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dc.contributor.author汪大暉en_US
dc.contributor.authorWANG TAHUIen_US
dc.date.accessioned2014-12-13T10:39:41Z-
dc.date.available2014-12-13T10:39:41Z-
dc.date.issued2001en_US
dc.identifier.govdocNSC90-2215-E009-069zh_TW
dc.identifier.urihttp://hdl.handle.net/11536/96741-
dc.identifier.urihttps://www.grb.gov.tw/search/planDetail?id=665707&docId=126375en_US
dc.description.sponsorship行政院國家科學委員會zh_TW
dc.language.isozh_TWen_US
dc.subject超薄閘極zh_TW
dc.subject可靠度zh_TW
dc.subject氧化層zh_TW
dc.subject協助金屬-氧化物-半導體元件zh_TW
dc.subjectUltra-thin gateen_US
dc.subjectReliabilityen_US
dc.subjectOxide layeren_US
dc.subjectCMOS deviceen_US
dc.title超薄閘極氧化層元件可靠性研究zh_TW
dc.titleUltra-Thin Gate Dielectric CMOS Device Reliabilityen_US
dc.typePlanen_US
dc.contributor.department國立交通大學電子工程學系zh_TW
Appears in Collections:Research Plans