標題: Strained CMOS devices with shallow-trench-isolation stress buffer layers
作者: Li, Yiming
Chen, Hung-Ming
Yu, Shao-Ming
Hwang, Jiunn-Ren
Yang, Fu-Liang
資訊工程學系
電信工程研究所
Department of Computer Science
Institute of Communications Engineering
關鍵字: cannel surface buffer layer;fabrication;measurement;mobility;MOS devices;shallow-trench isolation (STI);sidewall stress buffer layer;simulation;transport characteristics
公開日期: 1-Apr-2008
摘要: In this brief, shallow-trench-isolation (STI) stress buffer techniques, including sidewall stress buffer and channel surface buffer layers, are developed to reduce the impact of compressive STI stress on the mobility of advanced n-type MOS (NMOS) devices. Our investigation shows that a 7% driving current gain at an NMOS device has been achieved, whereas no degradation at a p-type MOS (PMOS) device was observed. The same junction leakage at both the NMOS and PMOS devices was maintained. A stress relaxation model with simulation is thus proposed to account for the enhanced transport characteristics.
URI: http://dx.doi.org/10.1109/TED.2008.916708
http://hdl.handle.net/11536/9488
ISSN: 0018-9383
DOI: 10.1109/TED.2008.916708
期刊: IEEE TRANSACTIONS ON ELECTRON DEVICES
Volume: 55
Issue: 4
起始頁: 1085
結束頁: 1089
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