標題: 前瞻多閘極/全包覆閘極、奈米線、及穿隧場效電晶體於靜態隨機存取記憶體、邏輯、類比應用之分析與評估
Evaluation of Emerging Multi-Gate/Gate-All-Around, Nanowire and Tunneling MOSFETs for SRAM, Logic, and Analog Applications
作者: 莊景德
Chuang Ching-Te
國立交通大學電子工程學系及電子研究所
關鍵字: 多閘極場效電晶體;全包覆閘極場效電晶體;奈米線金氧半場效電晶體;無邊界 奈米線金氧半場效電晶體;穿隧場效電晶體;邏輯;類比;靜態隨機存取記憶體;變異;MuGFET;Nanowire MOSFET;Junctionless MOSFET;Tunnel FET;Logic;Analog;SRAM;Variability
公開日期: 2013
摘要: 在此研究計畫中,我們將對幾種具有潛力的前瞻奈米元件,針對其在靜態隨 機存取記憶體、邏輯電路、及類比電路的應用上進行綜合研究。此研究將用以物 理為基礎的原子級三維 TCAD 元件與混合式模擬來進行。元件將依據 ITRS 的 路程圖及最先進的文獻來設計,而材料與元件的參數將依據文獻的資料來校正。 我們研究的前瞻奈米元件包含多閘極及全包覆閘極場效電晶體、奈米線金氧半場 效電晶體、無邊界 (junctionless) 奈米線金氧半場效電晶體、矽基底的穿隧場效 電晶體以及鍺基底或其他低能隙材料基底的穿隧場效電晶體,並對其在靜態隨機 存取記憶體的穩定度、邏輯電路的功秏與效能、及類比電路的增益與頻寬做詳細 的探討分析。在邏輯電路方面,我們將分析此些前瞻奈米院件在反向器串鏈、二 位元NAND、及複功器等漏電流與延遲的關係,並且分析溫度與變異對於其漏 電流與效能的影響。同時,對於此些前瞻奈米元件在靜態隨機存取記憶體的讀取 雜訊容忍度、靜態寫入雜訊容忍度、讀取時間、寫入時間、記憶體單元漏電流、 及本質元件變異對穩定度與效能的影響。此外,在類比性質、小訊號參數以及基 本類比電路上,針對此些前瞻奈米元件做深入的綜合性比較與探討。我們的研究 將對多閘極及全包覆閘極場效電晶體、奈米線金氧半場效電晶體、無邊界奈米線 金氧半場效電晶體、矽基底的穿隧場效電晶體以及鍺基底或其他低能隙材料基底 的穿隧場效電晶體在靜態隨機存取記憶體、邏輯電路、類比電路的應用上提供對 其優點、限制、權衡 (trade-off)、及實質效益的深入瞭解。
In this project, we will conduct a comprehensive study on various emerging devices based SRAMs, logic circuits and analog circuits. The study will be carried out using physics-based atomistic 3D TCAD device and mix-mode simulations with devices designed based on ITRS Roadmap and the most up-to-date literature and material/device parameters calibrated with available data in the literature. Emerging Multi-Gate/Gate-All-Around FET (MuG/GAA FET), Nanowire MOSFET, Junctionless Nanowire MOSFET, Si based Tunneling FET (TFET), and Ge or other low band-gap material based Tunneling FETs will be investigated and the stability, power-performance and gain-bandwidth will be evaluated for SRAM, logic, and analog applications. Leakage-Delay of logic circuits based on these emerging devices will be comprehensively analyzed including inverter chain, two-way NAND and Mux, etc., and the impact of temperature and variability on the leakage/performance will be carried out. The stability, performance and variability of SRAMs based on these emerging devices will be investigated including Read Static Noise Margin (RSNM), Write Static Noise Margin (WSNM), Read Access time, Time to Write, and cell leakage; and the impacts of intrinsic device variations on the stability and performance metrics will be assessed. The analog properties, small-signal parameters, basic analog circuits based on these emerging devices, and the impacts of intrinsic device variations on analog/matching properties will also be comprehensively studied. Our investigation will provide detailed physical understanding of the advantages, constraints, trade-off and merits of MuGFET, GAA FET, Nanowire MOSFET, Junctionless Nanowire MOSFET, Si based Tunneling FET, and Ge or other low band-gap materials based Tunneling FET devices for logic, memory, and analog applications.
官方說明文件#: NSC101-2221-E009-150-MY2
URI: http://hdl.handle.net/11536/94022
https://www.grb.gov.tw/search/planDetail?id=2851119&docId=403779
Appears in Collections:Research Plans