標題: Impact of static and dynamic stress on threshold voltage instability in high-k/metal gate n-channel metal-oxide-semiconductor field-effect transistors
作者: Dai, Chih-Hao
Chang, Ting-Chang
Chu, Ann-Kuo
Kuo, Yuan-Jui
Lo, Wen-Hung
Ho, Szu-Han
Chen, Ching-En
Shih, Jou-Miao
Chen, Hua-Mao
Dai, Bai-Shan
Xia, Guangrui
Cheng, Osbert
Huang, Cheng Tung
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
公開日期: 28-Feb-2011
摘要: This letter investigates the impact of static and dynamic stress on threshold voltage (V(th)) instability in ultrathin n-channel metal-oxide-semiconductor field-effect transistors with hafnium-based gate stacks. Experimental results indicate V(th) shift under dynamic stress is more serious than that under static stress due to charge trapping within the high-k dielectric. Capacitance-voltage techniques demonstrated that electron trapping under dynamic stress was located in the high-k dielectric near the source/drain overlap region rather than throughout the overall dielectric layer. This implies in real circuit operation, the phenomenon of electrons trapped in high-k near the source/drain overlap is the main issue affecting V(th) instability. (C) 2011 American Institute of Physics. [doi:10.1063/1.3560463]
URI: http://dx.doi.org/10.1063/1.3560463
http://hdl.handle.net/11536/9282
ISSN: 0003-6951
DOI: 10.1063/1.3560463
期刊: APPLIED PHYSICS LETTERS
Volume: 98
Issue: 9
結束頁: 
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