標題: Anomalous on-current and subthreshold swing improvement in low-temperature polycrystalline-silicon thin-film transistors under Gate bias stress
作者: Lin, Chia-Sheng
Chen, Ying-Chung
Chang, Ting-Chang
Jian, Fu-Yen
Li, Hung-Wei
Chen, Yi-Chuan
Chen, Te-Chih
Tai, Ya-Hsiang
電子工程學系及電子研究所
光電工程學系
顯示科技研究所
Department of Electronics Engineering and Institute of Electronics
Department of Photonics
Institute of Display
公開日期: 21-Mar-2011
摘要: This work investigates an improvement in anomalous on-current and subthreshold swing (SS) in Low-temperature polycrystalline-silicon thin-film transistors after positive gate bias stress. The experimental results reveal that the improved electric properties are due to the hole trapping at SiO(2) above the lightly doped drain regions, which causes a strong electric field at the gate corners. The effect of the hole trapping is to reduce the effective channel length and the SS. Besides, the stress-related electric field was also simulated by TCAD software to verify the mechanism above. (C) 2011 American Institute of Physics. [doi:10.1063/1.3568895]
URI: http://dx.doi.org/10.1063/1.3568895
http://hdl.handle.net/11536/9131
ISSN: 0003-6951
DOI: 10.1063/1.3568895
期刊: APPLIED PHYSICS LETTERS
Volume: 98
Issue: 12
結束頁: 
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