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dc.contributor.authorMa, William Cheng-Yuen_US
dc.contributor.authorChiang, Tsung-Yuen_US
dc.contributor.authorYeh, Chi-Rueien_US
dc.contributor.authorChao, Tien-Shengen_US
dc.contributor.authorLei, Tan-Fuen_US
dc.date.accessioned2014-12-08T15:11:49Z-
dc.date.available2014-12-08T15:11:49Z-
dc.date.issued2011-04-01en_US
dc.identifier.issn0018-9383en_US
dc.identifier.urihttp://dx.doi.org/10.1109/TED.2011.2104362en_US
dc.identifier.urihttp://hdl.handle.net/11536/9065-
dc.description.abstractIn this paper, the channel-film-thickness effect of low-temperature polycrystalline-Si thin-film transistors (LTPS-TFTs) is investigated. Greater channel film thickness can provide a higher field-effect mobility mu FE, rising from 14.33 to 22.33 cm(2)/V . s, as the channel film thickness increases from 55 to 120 nm, due to grain-size effect. In addition, varying the channel film thickness of LTPS-TFTs results in different junction leakage current due to the source/drain (S/D) junction area effect. Moreover, the S/D series resistance also significantly increases when the channel film thickness is reduced from 120 to 35 nm, leading to poor field-effect mobility mu FE and driving current. Consequently, the optimum channel film thickness for active-matrix liquid-crystal displays may be identified.en_US
dc.language.isoen_USen_US
dc.subjectChannel film thicknessen_US
dc.subjectlow-temperature polycrystalline-Si thin-film transistors (LTPS-TFTs)en_US
dc.subjectscaling downen_US
dc.titleChannel Film Thickness Effect of Low-Temperature Polycrystalline-Silicon Thin-Film Transistorsen_US
dc.typeArticleen_US
dc.identifier.doi10.1109/TED.2011.2104362en_US
dc.identifier.journalIEEE TRANSACTIONS ON ELECTRON DEVICESen_US
dc.citation.volume58en_US
dc.citation.issue4en_US
dc.citation.spage1268en_US
dc.citation.epage1272en_US
dc.contributor.department電機工程學系zh_TW
dc.contributor.departmentDepartment of Electrical and Computer Engineeringen_US
dc.identifier.wosnumberWOS:000288676200049-
dc.citation.woscount3-
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