標題: A symbol-rate timing synchronization method for low power wireless OFDM systems
作者: Yu, Jui-Yuan
Chung, Ching-Che
Lee, Chen-Yi
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
關鍵字: dynamic sample-timing controller (DSTC);orthogonal frequency-division multiplexing (OFDM);phase-tunable clock generator (PTCG);synchronization;ultra-wide-band
公開日期: 1-Sep-2008
摘要: This work addresses power reduction and performance improvement for wireless orthogonal frequency-division multiplexing (OFDM) systems using a dynamic sample-timing controller (DSTC) and phase-tunable clock generator (PTCG). The receiver, applying the proposed DSTC algorithm, searches for the optimal sampling phase at the symbol rate, instead of the Nyquist rate (or higher), to reduce the extra power consumed in high-rate operations. The proposed PTCG circuits provide the desired clock phase for optimum sampling to improve system performance. Both the DSTC and the PTCG are evaluated in a multibandt OFDM (MB-OFDM) ultra-wide-band system. Simulation results indicate that the overall system performance is improved by 1.7-dB signal-to-noise ratio at a packet error rate of 8% and the total baseband power is reduced by 40%.
URI: http://dx.doi.org/10.1109/TCSII.2008.923405
http://hdl.handle.net/11536/8389
ISSN: 1549-7747
DOI: 10.1109/TCSII.2008.923405
期刊: IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS
Volume: 55
Issue: 9
起始頁: 922
結束頁: 926
Appears in Collections:Articles


Files in This Item:

  1. 000258950800019.pdf