標題: 繪圖處理器中分庫材質快取記憶體之設計
Design of a Banked Texture Cache for Graphic Processing Unit
作者: 康哲瑋
Che-Wei Kang
單智君
Jyh-Jiun Shann
資訊科學與工程研究所
關鍵字: 繪圖處理器;材質快取記憶體;GPU;Texture Cache
公開日期: 2006
摘要: 在現今繪圖處理器中,材質過濾器演算法需要多個紋素(材質上的最小單位)去混色出最後顯示在螢幕的顏色。由於這些紋素在材質快取記憶體可能散在數個區段中或是分散在同一個區段中不連續的位子。這樣的情形使得完成一次過材質過濾可能要多次存取材質快取記憶體,讓整體處理時間變長。然而多次的快取記憶體存取間接也造成動態電力的消耗提高。在此篇論文我們提出了分庫的材質快取記憶體設計,利用雙向性過濾演算法以及材質擺放的特性下去設計。我們提出兩種資料庫的設計,分別是插敘資料庫和連續資料庫。此外我們也設計分庫標籤,以降低每次存取需要多筆標籤比對的代價。我們的設計可以讓做雙向性處理時,只需要去材質快取記憶體存取一次即可拿到所需的紋素。跟寬的匯流排設計比較,在畫面解析度為1280×1024下,分庫的材質快取記憶體減少大約50%的快取記憶體存取次數。由於存取的次數減少,兩種分庫設計分別減少大約44%以50%的材質快取記憶體的動態電力消耗。
In modern Graphic Processing Unit (GPU), texture filter needs several texels (element of texture) to compute the final color in screen. The requested texels of texture filtering may be in different cache lines or discontinuous position of a cache line. This makes finishing one filtering may have to access texture multiple times. Multiple cache access causes the process time longer. However, multiple cache access also causes the dissipation of access power high. At this thesis, we proposed a banked texture cache which is according to bilinear filtering and texture placement. We design two kinds of data bank. The two kinds of data bank are interleaved data bank and continuous data bank. And we also design tag bank to reduce the cost of multiple tag comparison. The banked texture cache can fetch the requested texels of bilinear filtering in one cache access. Compare with wide bus design, banked texture cache can reduce 50% of cache access times. The access energy of two kinds of texture cache are reduced by 44% and 50% with 1280×1024 resolution due to less cache access times.
URI: http://140.113.39.130/cdrfb3/record/nctu/#GT009455596
http://hdl.handle.net/11536/82118
Appears in Collections:Thesis


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  1. 559601.pdf