標題: 嵌入式系統雙指令JAVA 處理器設計
A Double-Issue JAVA Processor Design for Embedded Applications
作者: 柯厚任
Hou-Jen Ko
蔡淳仁
Chun-Jen Tsai
資訊科學與工程研究所
關鍵字: 爪哇;處理器;虛擬機器;java;processor;virtual machine
公開日期: 2006
摘要: Java應用程式於嵌入式媒體被廣泛的應用,如CDC/PBP用於下個世代的數位電視機上盒,本篇論文主要探討Java處理器的設計,來達到加速的目的
Java applications for embedded systems are becoming popular today. CLDC/MIDP is the standard application platform for mobile phones while CDC/PBP is the emerging application platform for next generation digital TV set-top boxes. Although software-based Java Virtual Machines (VM) are prevalent, most of these VMs require a host processor running at much higher clock rate than 300MHz to reach reasonable performance. This is beyond the recommended specification of handsets and set-top boxes. In this thesis, we have proposed a double-issue java processor for embedded systems. The design is not tied to any host processors and can be used as an efficient binary execution engine for a full Java Runtime Environment implementation. When synthesized on a Virtex IV FPGA (4VFX12FF66-10), the RTL model can reach over 100MHz and consumes less than 23% resources of the device.
URI: http://140.113.39.130/cdrfb3/record/nctu/#GT009455586
http://hdl.handle.net/11536/82107
Appears in Collections:Thesis


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