標題: Investigation on Board-Level CDM ESD Issue in IC Products
作者: Ker, Ming-Dou
Hsiao, Yuan-Wen
電機學院
College of Electrical and Computer Engineering
關鍵字: Board-level charged-device model (CDM);chip-level CDM;electrostatic discharge (ESD);failure analysis
公開日期: 1-Dec-2008
摘要: The impacts caused by board-level charged-device-model (CDM) electrostatic-discharge (ESD) events on integrated-circuit products are investigated in this paper. The mechanism of board-level CDM ESD event is introduced first. Based on this mechanism, an experiment is performed to investigate the board-level CDM ESD current waveforms under different sizes of printed circuit boards (PCBs), charged voltages, and series resistances in the discharging path. Experimental results show that the discharging current strongly depends on the PCB size, charged voltage, and series resistance. Moreover, the chip- and board-level CDM ESD levels of several test devices and test circuits fabricated in CMOS processes are characterized and compared. The test results show that the board-level CDM ESD level of the test circuit is lower than the chip-level CDM ESD level of the test circuit, which demonstrates that the board-level CDM ESD event is more critical than the chip-level CDM ESD event. In addition, failure analysis reveals that the failure in the test circuit under board-level CDM ESD test is much severer than that under chip-level CDM ESD test.
URI: http://dx.doi.org/10.1109/TDMR.2008.2006850
http://hdl.handle.net/11536/8113
ISSN: 1530-4388
DOI: 10.1109/TDMR.2008.2006850
期刊: IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY
Volume: 8
Issue: 4
起始頁: 694
結束頁: 704
Appears in Collections:Articles