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dc.contributor.authorChang, T.en_US
dc.contributor.authorKao, H. L.en_US
dc.contributor.authorMcAlister, S. P.en_US
dc.contributor.authorHorng, K. Y.en_US
dc.contributor.authorChin, Alberten_US
dc.date.accessioned2014-12-08T15:10:35Z-
dc.date.available2014-12-08T15:10:35Z-
dc.date.issued2008-12-01en_US
dc.identifier.issn0741-3106en_US
dc.identifier.urihttp://dx.doi.org/10.1109/LED.2008.2007509en_US
dc.identifier.urihttp://hdl.handle.net/11536/8088-
dc.description.abstractWe have fabricated 0.18-mu m asymmetric MOSFETs using a foundry-standard 1P6M process, without making any process modifications. In comparison with a conventional 0.18-mu m MOSFET, the asymmetric MOSFET design leads to a 64% improvement in the saturated output power and 8 dB better adjacent channel power ratio. The improvement in the RF power E performance of these MOS transistors suggests that they should be suitable for medium power amplifiers.en_US
dc.language.isoen_USen_US
dc.subjectAsymmetricen_US
dc.subjectlightly doped-drain (LDD)en_US
dc.subjectMOSen_US
dc.subjectRF Poweren_US
dc.titleImproved RF Power Performance in a 0.18-mu m MOSFET Which Uses an Asymmetric Drain Designen_US
dc.typeArticleen_US
dc.identifier.doi10.1109/LED.2008.2007509en_US
dc.identifier.journalIEEE ELECTRON DEVICE LETTERSen_US
dc.citation.volume29en_US
dc.citation.issue12en_US
dc.citation.spage1402en_US
dc.citation.epage1404en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000262062000035-
dc.citation.woscount4-
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