標題: IEEE 802.16e OFDMA 下行同步技術之探討與數位訊號處理器實現
Research in and DSP Implementation of Synchronization Techniques for IEEE 802.16e OFDMA Downlink
作者: 洪潤傑
Junchieh Hung
桑梓賢
Tzuhsien Sang
電子研究所
關鍵字: 下行;同步;技術;探討;數位;訊號;處理器;實現;Research;DSP;Implementation;Synchronization;Techniques;IEEE;802.16e;OFDMA;Downlink
公開日期: 2007
摘要: 本篇論文提出IEEE 802.16e正交分頻多工存取(OFDMA)下行(downlink)過程中起始同步的機制,包含符碼時間偏移、載波偏移的同步與基地台(cell)同步碼索引(preamble index)的識別。當一個行動電話在一開始要進入網路的時候,我們必須做起始的同步。我們提出的方法不需要傳送端同步碼的訊息,只需利用同步碼的結構、循環字首(cyclic prefix)以及傅立葉轉換(Fourier transform)的性質,即可做到時間和頻率的同步,與基地台同步碼索引的識別。而在之後的次訊框裡,行動電話只需要做到追蹤符碼時間偏移和小數部分載波偏移即可。 我們首先用浮點數運算來驗證起始同步的技術,並在多路徑Rayleigh 衰減通道下做模擬,模擬速度大約120 km/h,並觀察其結果。最後,我們選擇最適合我們系統的同步演算法,並把這些方法修改成定點運算的版本,實現在數位訊號處理(DSP)平台上。
In this thesis, we propose an initial synchronization scheme for time, carrier frequency synchronization and cell preamble index identification in 802.16e OFDMA downlink. In DL synchronization, the mobile station receiver needs to perform initial synchronization upon its initial entrance to the network. The proposed method does not require knowledge of actual transmitted preamble, but only utilizes the preamble structure, CP, and inverse Fourier transform properties to obtain time/frequency synchronization and cell preamble index identification. Then in subsequent sub-frame, the mobile station only needs to track the timing and fractional CFO. We verify the initial synchronization techniques in floating point computation, simulate in multi-path Rayleigh fading channel which the speed is about 120 km/h, and see the performance. In the end, we choose the most suitable methods for our system into fixed point version on the DSP platform.
URI: http://140.113.39.130/cdrfb3/record/nctu/#GT009411678
http://hdl.handle.net/11536/80593
Appears in Collections:Thesis


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