標題: 適用於IEEE 802.16e及802.11n標準之可配置低密度同位元檢查碼解碼器設計與實現
Design and Implementation of a Configurable LDPC Decoder for IEEE 802.16e and 802.11n
作者: 劉士賢
Shih-Hsien Liu
劉志尉
Chih-Wei Liu
電子研究所
關鍵字: 解碼器;無線通訊系統;通道編碼;低密度同位元檢查碼;設計與實現;通訊解碼;LDPC;802.11n;802.16e;WiMax;WiFi;WiMAN;channel coding;Decoder;IEEE;code
公開日期: 2007
摘要: 這篇論文提出一個支援全模式適用於IEEE 802.16e 及802.11n標準之可配置低密度同位元檢查碼解碼器。一個採用列跟新訊息傳遞演算法的部份平行化架構被設計來達到高速傳輸速率及解碼能力。我們討論一些主題包括,解碼演算法的分析及最佳化,架構設計及實現,提早中斷機制(early termination),多區塊解碼技巧(multi-codeword decoding),排程以及後段佈局的模擬數據(post-layout simulation) 低密度同位元檢查碼(LDPC code)是最好的更正碼其中之一。最近因它良好的解碼能力及稀疏矩陣的特性,引起許多研究興趣。由於它的高度平行化特性,使其容易設計及實現高速需求的架構。一些高速的通訊系統如建立在IEEE 802.16e標準的WiMAX和802.11n標準的WiFi均採用低密度同位元檢查碼來提供通道更正的能力。我們設計一個可配置的架構適用於802.16e跟802.11n的所有的碼率及碼長。 一個核心面積(core size)為2.14□2.14 mm2解碼器被實現在台積電0.13μm 1P8M CMOS的製程下。在802.16e中,10次迴圈下,它具有最高傳輸速率590 Mb/s且平均功率消耗是451 mW。而在802.11n中,最高速率是506 Mb/s而功率消耗是436 mW。藉著降低操作頻率到66 MHz (333 MHz的五分之一),以符合802.16e最低傳輸速率的要求,30 Mb/s,傳輸速率降為42.6~118 Mb/s根據不同的碼長及碼率。平均功率消耗則被降至91 mW針對802.16e中,碼率5/6,碼長2304位元測量下。
This thesis presents a fully compliant, configurable LDPC decoder for 802.16e and 802.11n. A partially parallel architecture with scheduled row-update message passing algorithm is designed to archive high throughput and decoding performances. We discuss some topics, decoding algorithm analysis and optimization, architecture design and implementation, early termination, multi-codeword decoding technique, scheduling, and post-layout simulation results. LDPC code is one of best error correction codes. Recently, it engages much research interest because of its sparse matrix and well decoding performance. Due to its high parallelizable algorithm, the high speed architecture is easy to be designed and implemented. Some high speed communication systems, WiMAX based on IEEE 802.16e standard and WiFi based on 802.11n standard both take LDPC codes to provide channel correction ability. We design a configurable architecture for full code rates and codeword lengths in 802.11n and 802.16e. The decoder with a core size 2.14□2.14 mm2 is implemented in TSMC 0.13 μm 1P8M CMOS technology. It has a peak throughput of 590 Mb/s and power dissipation of 451 mW with 10 iterations for 802.16e and a throughput of 506 Mb/s with 436 mW power consumption for 802.11n. By slowing down operating frequency to 66 MHz (one-fifth of 333 MHz) to meet required minimum throughput, 30 Mb/s for 802.16e, its throughput is 42.6~118 Mb/s for different code rates and codeword lengths. Average power consumption is lower to 91 mW for code rate 5/6, codeword length 2304 bits in 802.16e.
URI: http://140.113.39.130/cdrfb3/record/nctu/#GT009411653
http://hdl.handle.net/11536/80565
Appears in Collections:Thesis


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