標題: 使用I-line stepper 開發 Low cost 及可大量生產之0.25 um gate pHEMT
Development of Cost Effective and Manufacturable 0.25 um gate-length Power pHEMT using I-line Stepper
作者: 賴宗志
Tsung-Tzu Lai
張翼
張立
Yi Chang
Li Chang
工學院半導體材料與製程設備學程
關鍵字: 砷化鎵化合物半導體;功率放大器;0.25 微米閘極線寬;假性高電子遷移率場效電晶體;0.25um gate;pHEMT;low cost power pHEMT device;I-line stepper
公開日期: 2006
摘要: 在本篇論文中將使用 I-line stepper 以及正負光阻及光阻之re-flow製程來形成T型閘極,並達到閘極線寬有效縮小,形成所需要之閘極線寬0.25 um製程,本實驗並將導入6寸之砷化鎵晶片的量產開發,並將此技術應用在假性高電子遷移率場效電晶體上,最後比較 元件之 DC 及 RF 特性,並與其他閘極製程之元件做比較,得到更優異之元件特性。
A robust, manufacturable and coat effective high-performance 0.25 μm gate length AlGaAs/InGaAs pseudomorphic High-Electron Mobility Transistor (pHEMT) MMICs process on 150 mm substrates is revealed. The process that base on 0.25 μm gate lengths are achieved using cost effective I-line photolithography process technology. The process is by triple photo resister layers and bakes Photo-resister to re-flow to 0.25 μm. The process features a depletion-mode transistor with a nominal Pinch-off voltage @ Ig=1 mA/mm of -1.2V, on-resistance of 0.8 ohm-mm, Extrinsinic Transconductance (GM_PEAK) is 450 mS/mm, gate to- drain breakdown voltage of 19.5 V, unity current gain cut-off frequency of 146.82 GHz (peak), Cut-off frequency (ft) @ Vds=1.5 volt of 60 GHz, IDmax @VDS=1.5 V, VGS=0.5 V of 500 mA/mm, and Drain current @VGS=0 V;VDS=1.5 V of 300 mA/mm. Passive components include 400 pF/mm2 MIM capacitors, 150 ohm/square epitaxial resistors, precision 50 ohm/square TaN resistors, and low-loss inductors using air-bridge. A wide variety of applications can be realized over a broad frequency range including low-noise amplifiers for consumer Direct Broadcast Satellite dish systems (Ku-band) and medium power amplifiers for automotive radar (W-band), for example.
URI: http://140.113.39.130/cdrfb3/record/nctu/#GT009375511
http://hdl.handle.net/11536/80289
顯示於類別:畢業論文


文件中的檔案:

  1. 551101.pdf