標題: 低溫多晶矽薄膜電晶體非匹配效應之研究
Study of Mismatch Effect for Low Temperature Polysilicon Thin Film Transistors
作者: 高鈺函
Yu-Han Kao
戴亞翔
Ya-Hsiang Tai
光電工程學系
關鍵字: 薄膜電晶體;低溫多晶矽;非匹配;TFT;LTPS;Mismatch
公開日期: 2005
摘要: 本論文主要研究低溫多晶矽薄膜電晶體的非匹配效應。首先我們探討在小尺寸元件叉合(Interfigitated)效應對尺寸的影響,發現非匹配因素隨著元件面積的增加而遞減。為了進一步探討叉合效應的非匹配特性,我們使用了大量相同面積的枕木型元件以作為實驗的依據。藉由分析元件參數差值的標準差,我們發現叉合方法比傳統方法具有更優良的特性,其中位障電壓與遷移率差值的標準差與叉合數目呈現反比,特別是位障電壓,因此我們提出一個公式以準確預測叉合方法的效能。此外,我們也探討了叉合方法中的距離效應,發現距離遠近與非匹配效應並沒有明顯的關聯性。接著我們利用電容量測的方法來加以驗證非匹配效應,實驗方法是採取電容對電壓的微分並觀察其最大值與相對應的電壓。我們發現叉合方法的標準差明顯地減少,進一步的驗證了叉合方法對非匹配效應的改良。
In this thesis, we investigate the mismatch issue for LTPS TFTs. Firstly we aim at the size and interdigit effects for small area TFTs. It is observed that the mismatching factor decreases rapidly with the increase of the device’s area. To further investigate the mismatching properties of the interdigitated arrangements, a huge number of crosstie devices with the same dimension are utilized. By analyzing standard deviations of parameters’ differences, it is found that the interdigitated method is indeed superior than the original. Besides, Vth and Muo are inversely proportional to the interdigit’s finger numbers, especially the threshold voltage. Therefore, a model is proposed to predict the performance of the interdigitated method, which has high accuracy with the real data. As far as distance analysis is concerned, almost no correlations between the distance and mismatch effect could be observed. Next, the mismatching properties are examined by C-V measurements. We take the derivatives of capacitance versus gate voltage to observe the maximum value and its corresponding voltage. As a consequence, standard deviations with interdigitated method are smaller than those of original devices, which is consistent with the conclusion of I-V measurement.
URI: http://140.113.39.130/cdrfb3/record/nctu/#GT009324539
http://hdl.handle.net/11536/79203
Appears in Collections:Thesis


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