標題: Characteristics of Gate-All-Around Twin Poly-Si Nanowire Thin-Film Transistors
作者: Sheu, Jeng-Tzong
Huang, Po-Chun
Sheu, Tzu-Shiun
Chen, Chen-Chia
Chen, Lu-An
材料科學與工程學系
材料科學與工程學系奈米科技碩博班
Department of Materials Science and Engineering
Graduate Program of Nanotechnology , Department of Materials Science and Engineering
關鍵字: Gate-all-around (GAA);nanowire (NW);plasma treatment;short-channel effects (SCEs);thin-film transistor (TFT)
公開日期: 1-Feb-2009
摘要: We have investigated the characteristics of gate-all-around (GAA) twin polycrystalline-silicon nanowire (NW) thin-film transistors (TFTs). The NW channel and surrounding gate imparted the GAA twin NW TFT with superior channel controllability. Moreover, the combination of the high surface-to-volume ratio of the NW and the split channel structure led to highly efficient NH(3) plasma treatment, which reduced the effective grain-boundary trap-state density. The GAA twin NW TFT exhibited greatly improved electrical performance, including a lower threshold voltage, a steeper subthreshold swing (114 mV/dec), a higher on/off current ratio (> 10(8)), and a virtual absence of drain-induced barrier lowering (1.3 mV/V).
URI: http://dx.doi.org/10.1109/LED.2008.2009956
http://hdl.handle.net/11536/7681
ISSN: 0741-3106
DOI: 10.1109/LED.2008.2009956
期刊: IEEE ELECTRON DEVICE LETTERS
Volume: 30
Issue: 2
起始頁: 139
結束頁: 141
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