A Study of Leakage Current and Reliability Issues in Poly-Si Thin-Film Transistors
|關鍵字:||薄膜電晶體;複晶矽;奈米線;自我對準;閘極引發汲極漏電流;電漿處理;矽鍺;快速熱退火;熱載子;熱載子衰退;熱載子效應;測試結構;交流施壓;能態密度;元件模擬;可靠度;Thin-film transistor;Polycrystalline silicon;Nanowire;Self-aligned;Gate-induced drain leakage (GIDL);Plasma treatment;Silicon germanium;Rapid-thermal annealing (RTA);Hot-carrier;Hot-carrier degradation;Hot-carrier effect;Test structure;AC stress;Density of states;Device simulation;Reliability|
我們也研究了奈米線薄膜電晶體其獨特的關狀態漏電流機制。產生於閘極與汲極間重疊區域的閘極引發汲極漏電流(gate-induced drain leakage, GIDL)，被發現是造成此一異常漏電流的元兇。我們仔細檢驗了此一異常漏電流的產生原因，以及電漿處理對於此漏電流的影響。我們發現此一電流起因於在閘極與汲極介面的低掺雜區域，此區域引發了一條額外的漏電流路徑。在檢驗了漏電流的起因之後，我們提出並實際驗證了數種減少此一漏電流的方案。這些方案包括了快速熱退火(Rapid thermal annealing, RTA)、在閘極與汲極間插入一層氮化矽、以及改使用複晶矽鍺材料作為奈米線通道等。這數種方案的特色被逐一比較並加以討論。
In this thesis, we proposed and demonstrated a poly-Si thin-film transistor with self-aligned nanowire channels, as well as a novel test structure suitable for resolving hot-carrier degradation. Firstly, the fabrication of proposed NWTFT was described, followed by the detail in poly-Si nanowire formation and investigation of the factors affecting size and shape of the nanowire. The fabrication is simple and does not involve costly lithography tools. On-state characteristics of NWTFT were then examined and discussed, including as-fabircated and plasma-treated samples. The effects of post-metal treatment and geometric parameters on NWTFT were then discussed. The advantages of NWTFT were demonstrated by comparing with traditional planar structures. Such nanowire structure has been shown to be excellent in terms of on-current per unit width and controllability over short-channel effects. Owing to the fine nano-scale of NW width, hydrogenation would be very efficient for further performance improvement. The unique off-state leakage mechanism of NWTFT was also investigated. A gate-induced drain leakage (GIDL), which is generated in the overlapped region between the gate and the drain, was uncovered as the major culprit for the anomalous leakage. The origin of the anomalous leakage was then examined, as well as the effect of post-metal treatment. This current was found to originate from the lightly-doped region at gate/drain interface, which induced an additional current path. After that, several modifications were proposed and demonstrated in order to alleviate the unique leakage. Rapid thermal annealing (RTA), inserted nitride mask, and poly Si1-XGeX were investigated and compared. A tester, which can spatially and temporally resolve hot-carrier degradations, was proposed and demonstrated. The fabrication of the novel test structure is simple and compatible with standard ULSI processings without extra masking. Advantages in sensitivity and stress-condition determination were discussed, accompanying with the effects of post-metal plasma treatment on hot-carrier degradations. Specifically, we found that at least two mechanisms are responsible for the negative threshold voltage shift detected by monitor transistors. The high sensitivity and resolving capability of the novel test structure can also help researchers observe directly degradation phenomena occurring when devices are stressed under moderate or minor conditions. We also studied the phenomena of hot-carrier degradation during AC operations using the proposed test structure. Effects of frequency, rising and falling times, were investigated and discussed. The phenomena of the hot-carrier degradation can be spatially resolved using the proposed tester. By applying such a tester to AC hot-carrier stressing, the relationship between different stages of input signal and resultant damage location can be established. The tester also showed a high sensitivity in detecting even mild AC degradation. The experiment provides unambiguous evidence that the damage occurs during the transient stages, with the aid of the test structure. At the last part of the thesis, the analyses related to effective density-of-states distributions were performed. After the description of experimential procedures, effective density-of-states distributions of localized damaged regions were extracted using the aforementioned tester. The information revealed by the analyses was then discussed. The extracted density-of-states distributions for both unstressed and stressed films were used to conduct simulations for subthreshold characteristics of TFTs and compared with the experimental data. The combination of the proposed novel test structure and density-of-states extraction technique provides a powerful tool for resolving the non-uniform density-of-states distribution of TFTs after HC stressing, which is impossible using traditional testers.
|Appears in Collections:||Thesis|