標題: 利用鋁基介面層之高品質金屬-絕緣層-鍺電容器之研究
A Study on High Quality Metal-Insulator-Germanium Capacitor Using Al-based Interfacial Layer
作者: 楊易瑾
Yang, Yi-Chin
崔秉鉞
Tsui, Bing-Yue
電子工程學系 電子研究所
關鍵字: 鍺電容器;Germanium Capacitor
公開日期: 2014
摘要: 在這篇論文中,我們首先粹取了鍺在氮化鋁及三氧化二鋁中的擴散係數,證實兩種材料都能有效的阻擋鍺在熱製程中從基板擴散到介電層中。然後我們製作並研究了藉由電漿氧化法在原子層沉積高介電薄膜前形成很薄的GeOx介電層之鍺P型金屬絕緣半導體電容,發現有做過氧氣電漿處理的樣品比起沒做的樣品有比較少的介面缺陷電荷密度。而利用氮化鋁來當介面層的樣品比起用三氧化二鋁的樣品有比較低的漏電流以及比較小的遲滯現象,這是因為氮化鋁能比較有效的阻擋GeO的擴散與揮發,然而氮化鋁與鍺的介面卻非常的不好。我們也研究了氮在氮化鋁中的比例會造成的影響,發現隨著氮在氮化鋁中比例的增加,漏電流會降低。 其次,我們在三氧化二鋁上覆蓋一層氮化鋁以利用兩者的優點,我們發現,疊一層氮化鋁在三氧化二鋁之上除了改善漏電流以及遲滯現象,也會造成介面品質下降。我們判斷氮化鋁會與三氧化二鋁混合,降低氮化鋁的厚度可以減少介面品質下降的程度,但是漏電流及遲滯現象就會變嚴重。最後,我們藉由施加氮氣與氨氣電漿對三氧化二鋁進行改質處理,以改善漏電流以及遲滯現象,發現氨氣電漿會消耗氧化鍺並增加介面缺陷密度,氮氣電漿則可以在不增加介面缺陷密度的情況下改善漏電流以及遲滯現象。所以HfO2/Al2O3/GeOx/Ge金屬絕緣半導體結構配合氮氣電漿處理被視為用來做擁有超薄等效氧化層厚度的閘極堆疊的最佳選擇,用來製作出在攝氏450度沉積後退火後擁有等效氧化層厚度大概0.53奈米,同時保持很低的漏電(<4×〖10〗^(-2) A/cm^2)以及很小的遲滯現象(~120mV),還有在能量位於價帶電位0.2電子伏特的位置電荷缺陷密度低到3.13×〖10〗^12 (cm^(-2) eV^(-1)) 的電容。 因此,在相同等效氧化層厚度的情況下與當今發表過的研究相比,本篇論文達到較小的遲滯現象和較低的漏電流。這個結果預期能更加改善鍺基板金氧半場效電晶體的特性。
In this thesis, the diffusion coefficients of Ge in AlN and Al2O3 were extracted. Both materials have ability to be diffusion barriers for avoiding Ge atoms diffusion from the substrate into gate dielectric in thermal process effectively. Then, germanium MOS capacitors using plasma oxidation method to form a thin GeOx interfacial layer by oxidizing Ge surface beneath an ALD AlN and Al2O3 layers were fabricated and analyzed electrically. The samples with oxygen plasma treatment exhibits lower interface state density than that of the samples without oxygen plasma treatment. And using AlN as interfacial layer can achieve lower leakage current and smaller hysteresis than that of using Al2O3, because AlN is a more effective barrier to against GeO volatilization and Ge diffusion. However, the interface state density of the AlN/Ge structure is poor. We also investigate the effect of proportion of nitrogen in AlN. The leakage current decreases with the increase of nitrogen concentration in the dielectric. Secondly, an AlN layer was capped on Al2O3 for utilizing the advantages of AlN and Al2O3. It is found that capping AlN on Al2O3 improves the hysteresis and leakage current while degrades the interface state density. We suspect that AlN might mix with Al2O3 to form AlON layer. Decreasing the AlN thickness can decrease the degradation of interface state density, but the hysteresis and leakage current will become worse. Finally, N2 and NH3 plasma treatments were applied on Al2O3 for improving the hysteresis and leakage current. Nevertheless, it is observed that NH3 plasma would reduce the germanium oxide and degrade the interface state density. On the other hand, N2 plasma treatment can improve hysteresis and leakage current without degrading the interface state density. Thus, HfO2/Al2O3/GeOx/Ge MIS structure with N2 plasma treatment is recommended to be the best condition to fabricate gate stack with ultra-thin EOT, small hysteresis, and low leakage current density. The capacitor with EOT about 0.53 nm has been achieved while keeping low leakage current (<4×〖10〗^(-2) A/cm^2), small hysteresis (~120 mV), and Dit as low as 3.13×〖10〗^12 (cm^(-2) eV^(-1)) at E- Ev = 0.2 eV after 450˚C PDA. Therefore, this thesis has achieved a gate stack with smaller hysteresis, and lower leakage current in comparison with previous studies with the same EOT. This achievement is expected to further improve the performance of Ge MOSFETs.
URI: http://140.113.39.130/cdrfb3/record/nctu/#GT070150157
http://hdl.handle.net/11536/76426
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