標題: Single-electron effects in non-overlapped multiple-gate silicon-on-insulator metal-oxide-semiconductor field-effect transistors
作者: Lee, W.
Su, P.
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
公開日期: 11-Feb-2009
摘要: This paper systematically presents controlled single-electron effects in multiple- gate silicon-on-insulator (SOI) metal-oxide-semiconductor field-effect transistors (MOSFETs) with various gate lengths, fin widths, gate bias and temperature. Our study indicates that using the non-overlapped gate to source/drain structure as an approach to the single-electron transistor (SET) in MOSFETs is promising. Combining the advantage of gate control and the constriction of high source/drain resistances, single-electron effects are further enhanced using the multiple- gate architecture. From the presented results, downsizing multiple- gate SOI MOSFETs is needed for future room-temperature SET applications. Besides, the tunnel barriers and access resistances may need to be further optimized. Since the Coulomb blockade oscillation can be achieved in state-of-the-art complementary metal-oxide-semiconductor (CMOS) devices, it is beneficial to build SETs in low-power CMOS circuits for ultra-high-density purposes.
URI: http://dx.doi.org/10.1088/0957-4484/20/6/065202
http://hdl.handle.net/11536/7637
ISSN: 0957-4484
DOI: 10.1088/0957-4484/20/6/065202
期刊: NANOTECHNOLOGY
Volume: 20
Issue: 6
結束頁: 
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