The study of dry film photo-resist for high frequency flip chip bump application
Edward Y. Chang
|關鍵字:||乾膜;高頻;覆晶;凸塊;製程;模擬;Dry Film;High Frequency;Flip Chip;Bump;Process;Simulation|
The purpose of this thesis is to apply dry film photo-resist for high frequency flip-chip packaging. Dry film photo-resist has advantages over other thick film photo-resist for high process speed, excellent thickness uniformity, low exposure energy, and low cost. In the thick film fabrication process, problems were found and resolved. For each process step, optimized process parameters were found. Several kinds of bump materials were electroplated with dry film photo-resist as plating mask. Shear force of bumps with different kinds of materials were investigated. Novel cladding metal fabrication process is also proposed to solve the oxidation problem of the copper bumps. In addition, detailed flip-chip process flow was described and implemented. Bumps growth on alumina substrate side and gallium arsenide chip side were processed and discussed as well as the flip-chip bonding process. CPW lines with different sizes in conjunction with optimum bumps layout was designed to investigate the s parameter of the transmission lines. The results show that S11 is below -20dB and S21 is above -0.3dB as measured from DC to 40GHz. In summary, dry film photo-resist was applied to the wafer level high frequency flip-chip packaging process. With optimized circuit design and bump layout, high performance transmission lines for flip chip packages can be achieved using dry film as the masking material for the bump plating.
|Appears in Collections:||Thesis|