標題: 多執行緒Java處理器設計
Design of the Multithreading Architecture for a Java Processor
作者: 吳宗漢
Wu, Tsung-Han
蔡淳仁
Tsai, Chun-Jen
資訊科學與工程研究所
關鍵字: Java處理器;執行緒;同步處理;多核心;電路設計;Java processor;thread;synchronization;multi-core;monitor;circuit design
公開日期: 2013
摘要: 多執行緒在Java平台內是不可或缺的功能,例如web-browser內需要管理不同子視窗的連線、或者檔案下載軟體可能使用多個執行緒同時載入同個檔案內不同的data block。在本論文中我們將以Java Application IP (JAIP)為基礎,提出一個Multicore multithreaded Java processor Architecture,藉由同時執行多個Java處理器並且每個Java處理用上啟用temporal multithreading機制,達到每個處理器資源使用最佳化並且能容納更多執行緒,為了在我們提出的設計之中解決thread的分配與同步問題,我們也提出新架構用以協同每個Java處理器運作並且處理程式執行的一致性。此架構在Xilinx ML-605 FPGA平台上驗證。實驗結果顯示,我們提出的架構比單一Java處理器啟用temporal multithreading的執行效能有顯著的提升,並且將大幅縮減電路資源使用。
In this paper, we present the design of a four-core Java SoC with a centralized hardware thread manager and a coherent data cache controller across four processor cores. The Java processor core used in the SoC is based on the Java Application IP (JAIP) [1]. For thread synchronization, we propose a hardwired data coherence controller to coordinate the data access of all threads. The proposed architecture has been implemented and verified on the Xilinx ML605 FPGA platform. The experimental results show that the proposed architecture is very efficient. For multithreading applications, the speedup of a four-core system can be up to 3.69 times faster than a single-core system, tested using popular parallel benchmark programs.
URI: http://140.113.39.130/cdrfb3/record/nctu/#GT070156117
http://hdl.handle.net/11536/74492
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