標題: 應用於毫微米波段高電子遷移率電晶體之覆晶封裝研究
Flip-chip Packaging Structure of HEMTs Devices for Millimeter-wave Applications
作者: 王景德
Wang, Chin-Te
張翼
Chang, Edward Yi
材料科學與工程學系所
關鍵字: 覆晶封裝;高電子遷移率電晶體;毫微米波;底膠填充;可靠度;Flip-Chip Package;HEMTs;Millimeter-wave;Underfill;Reliability
公開日期: 2013
摘要: 近年來,無線通訊與成像技術的快速發展,推動其頻率源朝向毫微米與次毫微米波段,較大的傳輸頻寬、高傳輸速度與高解析度為這些頻率波段良好的特性,為了實現這些應用,封裝技術扮演了非常重要的角色,不僅提供了晶片與基板的傳輸途徑,還提供了散熱與保護的功能。在毫米波段的晶片層級封裝上,覆晶封裝為受到注目的技術,與傳統的打線接合比較,覆晶封裝的優點包含了較短的轉接路徑來減少寄生效應、較高的生產效率以及更小的封裝尺寸。 本論文探討應用於毫微米波段之覆晶封裝。首先,砷化鎵銦高電子遷移率電晶體封裝於氧化鋁基板上,在60GHz量測結果,藉由最佳化的覆晶轉接,覆晶封裝前後的元件特性幾乎相同。此外,利用微波積體電路概念設計並製作60GHz 兩階增益器,來驗證覆晶封裝元件設計V-band電路的可行性,將高電子遷移率電晶體封裝於設計有匹配電路的氧化鋁基板上,在60GHz時此增益器呈現9dB的小訊號增益,從結果顯示此微波積體電路的概念於毫微米波段的可行性。此外,由於晶片與基板的熱膨脹係數的不匹配會產生熱應力,而導致封裝結構的損壞,利用BCB當做底膠填充的材料來增加覆晶結構的機械強度與可靠度,從100GHz量測結果中,擁有較好的介電特性的BCB表現出優於傳統環氧樹脂底膠填充的高頻特性,從熱循環測試與剪切力測試的結果,BCB的填充可以有效的提升覆晶封裝結構的可靠度。 利用直接覆晶封裝(FCOB)於第二層的基板而省略晶片層級的封裝,在未來毫微米波應用達成兼顧成本效應與良好特性,商用的RO3210高分子基板因為有與氧化鋁基板相近的介電特性為有潛力的基板材料,封裝在高分子基板上的元件搭配經過最佳化的覆晶轉接直到W-band呈現良好的特性,利用最佳化的封裝結構,封裝元件仍擁有低雜訊且良好的增益特性,同時環氧樹脂底膠填充有效增加高分子覆晶結構的可靠度且沒有明顯的特性損耗。此外,也探討覆晶封裝製程中的溫度對封裝元件特性的影響,從實驗中可以發現較高的接合溫度會產生高頻特性的損耗,主要的原因是覆晶結構中砷化鎵晶片與高分子基板的熱膨脹係數不同所產生的熱應力,且利用有效電路模型,從S參數中萃取出的寄生電阻電容數值中可以發現,較高的接合溫度有較高的數值,因此,合理的覆晶接合條件可以減少熱應力並保持良好特性。
In recent years, the rapid development for wireless communication and imaging system has pushed the operational frequency for wireless communication to millimeter-wave or sub millimeter-wave bands. These frequency bands have several advantages, including wide transmission bandwidth, high transmission speed, and high signal resolution. In order to realize the targeted applications, the packaging technology plays an important role to provide the transmission path from chip to substrate, the heat dissipation, environment protection. In the chip-level packaging, the flip-chip is the more promising approach for millimeter-wave applications in comparison with conventional wire bonding. The advantages of the flip-chip interconnection are short path to reduce the parasitic effect and compact product size. This dissertation presents the study on the flip-chip packaging structure of HEMT devices for millimeter-wave applications. The flip-chip packaged In0.7Ga0.3As MHEMT device was firstly demonstrated on Al2O3 substrate. By adopting the optimized design for the flip-chip transition, the packaged device shows almost similar RF performance as the bare die up to 60 GHz. In addition, a two-stage gain block at 60 GHz was designed and fabricated using the microwave integrated circuit (MIC) approach to demonstrate the applicability for V-band applications. The MHEMT device was flip-chip packaged on Al2O3 substrate with the matching circuit. The gain block exhibited a small signal gain of 9 dB at 60 GHz, indicating the feasibility of MIC approach for millimeter-wave applications. The thermal stress induced by the coefficient of thermal expansion (CTE) mismatch between the chip and the substrate can distort the flip-chip structure. BCB material was used as the underfill to improve the reliability and mechanical property of the flip-chip structure. The good dielectric property of BCB exhibited better RF characteristics up to 100 GHz as compared to the conventional epoxy-based underfill. From the results of thermal cycling test and shear force test, BCB underfill can effectively improve the reliability of the flip-chip structure. The flip-chip on board (FCOB) technology bypassed the chip-level package to achieve cost-effective millimeter-wave package. The RO 3210 polymer substrate was the promising substrate because its dielectric property is similar to Al2O3 substrate. The packaged device with the optimal flip-chip structure exhibited good RF results up to W-band. An exopy-based underfill was applied to improve the reliability without the characteristic degradation of the device. Analytical results revealed that the proposed packaging structure maintained a low minimum noise figure of 3 dB with 6 dB of associated gain at 62 GHz. In addition, the impact of bonding temperature on the device performance was also investigated. The degradation in RF performance was observed at higher bonding temperature. The reason of the degradation was mainly due to the mismatch in the CTE between the GaAs chip and the polymer substrate. From the equivalent circuit extraction from S-parameter measurements, the higher parasitic values occurred during the higher bonding temperature. The applicable bonding condition could reduce the thermal stress without degrading the RF performance.
URI: http://140.113.39.130/cdrfb3/record/nctu/#GT079518522
http://hdl.handle.net/11536/74216
Appears in Collections:Thesis


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