標題: 通用式圖形處理器上考量快取記憶體行為之多執行緒決定機制
A Cache Behavior Aware Multithreading Degree Decision Scheme on GPGPUs
作者: 顏大剛
Yen, Ta-Kang
賴伯承
Lai, Bo-Cheng
電子工程學系 電子研究所
關鍵字: 通用式繪圖處理器;快取記憶體;多執行續;排程;gpgpu;cache;multithread;schedule
公開日期: 2013
摘要: 通用式繪圖處理器是目前一主流支援大量平行運算的處理器。為了在進行大量平行 運算時有更好的效能,快取記憶體與多執行緒並行為目前主流設計理念。然而,快取記 憶體大小的限制,使此二機制在需要大量記憶體存取的應用中會發生互相抵消其效能上 帶來的好處。針對這議題,本篇論文首先探討此二機制間的關聯性,並依此關聯性建立 一多執行緒並行運算量的決定機制,取得記憶體快取機制與多執行緒並行運算的平衡點。 在擁有大量記憶體存取的應用中,此機制降低多執行緒並行運算量,並提高快取記憶體 效率,因此平均運算效能提升 60%。在非大量記憶體存取的應用中,此機制也能將多執 行緒並行運算量設定在較高的值,避免效能降低。
GPGPUs have emerged as one of the most widely used throughput processors. Deep multithreading and cache hierarchy are the two effective implementations to achieve high throughput computing in modern GPGPUs. However, these are two conflicting design options. Finding a proper design point between the two has become a significant performance factor to GPGPUs. This paper investigates the correlation between caching behavior and multithreading technique. By demonstrating the trade-off issue between the multithreading and cache contention, the proposed decision scheme dynamically adjusts the multithreading degree to achieve superior performance. With the proposed decision scheme, the system performance of memory-intensive workloads can be improved by 60% averagely, and it prevents computation-bound workloads from performance degradation.
URI: http://140.113.39.130/cdrfb3/record/nctu/#GT070050227
http://hdl.handle.net/11536/74215
Appears in Collections:Thesis


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