標題: Analysis of an SOC architecture for MPEG reconfigurable video coding framework
作者: Hsiao, Jer-Min
Tsai, Chun-Jen
資訊工程學系
Department of Computer Science
公開日期: 2007
摘要: Due to the variety of popular video coding standards, many efforts have been put into the design of a single video decoder chip that supports multiple formats. In 2004, ISO/IEC MPEG started a new work item to facilitate multi-format video codec design and to enable more flexible usage of coding tools. The work item has turned into the MPEG Reconfigurable Video Coding (RVC) framework. The key concept of the RVC framework is to allow flexible reconfiguration of coding tools to create different codec solutions on-the-fly. In this paper, flexible SoC architecture is proposed to support the RVC framework. Some analysis has been conducted to show the extra costs required for this platform compared to hard-wired codec architecture. In conclusion, the RVC framework can be mapped to an SoC platform to provide flexibility and scalability for dynamic application environment with reasonable cost in hardware design.
URI: http://hdl.handle.net/11536/7401
http://dx.doi.org/10.1109/ISCAS.2007.377997
ISBN: 978-1-4244-0920-4
ISSN: 0271-4302
DOI: 10.1109/ISCAS.2007.377997
期刊: 2007 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-11
起始頁: 761
結束頁: 764
顯示於類別:會議論文


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  1. 000251608401008.pdf