標題: Distinguishing Between STI Stress and Delta Width in Gate Direct Tunneling Current of Narrow n-MOSFETs
作者: Hsieh, Chen-Yu
Lin, Yi-Tang
Chen, Ming-Jer
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
關鍵字: Delta width;layout;mechanical stress;MOSFET;piezoresistance;shallow trench isolation (STI);tunneling
公開日期: 1-May-2009
摘要: Direct tunneling current across a 1.27-nm-thick gate oxide of n-MOSFETs under STI compressive stress is measured in a wide range of the drawn gate width W (= 0.11, 0.24, 0.6, 1.0 and 10 mu m). The apparent gate current per unit width exhibits an increasing trend with decreasing W. In this narrowing direction, two fundamentally different effects are encountered: one of the delta width (Delta W) near the STI edge, and the other of the enhanced STI stress in the channel. To distinguish between the two effects, a new analytical width-dependent direct tunneling model is developed and applied. Reasonable agreement with data is achieved. The resulting delta width effect is found to dominate over the stress effect in narrow devices, while for the wide ones, they are comparable. The extracted Delta W (similar to 63 nm) and the underlying channel stress (with the uncertainties identified) straightforwardly produce a good fitting of the drain current variation counterpart. Specifically, it is justified that the delta width and STI stress are cooperative in constituting gate current variation, but both have opposite effects on the drain current one.
URI: http://dx.doi.org/10.1109/LED.2009.2015471
http://hdl.handle.net/11536/7287
ISSN: 0741-3106
DOI: 10.1109/LED.2009.2015471
期刊: IEEE ELECTRON DEVICE LETTERS
Volume: 30
Issue: 5
起始頁: 529
結束頁: 531
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