標題: 用P3HT奈米線與氧化鋅錫奈米線製作微電子P-N結元件
Poly(3-hexylithiophene)/ZTO nanowire p-n junction for microelectronics
作者: 李宥勳
Li, Yu-Hsun
簡紋濱
Jian, Wen-Bin
電子物理系所
關鍵字: P-N接面;奈米材料;氧化鋅錫;光伏特效應;P-N junction;ZTO;P3HT;photovoltaic
公開日期: 2012
摘要: 奈米材料是目前半導體中熱門的研究。本實驗使用ZTO奈米線材料擁有較佳的電子遷移率、導電度和結晶性;P3HT奈米線材料容易製備且成本低廉。我們將ZTO為N型的奈米線材料和P3HT為P型的奈米線材料混合形成P-N接面異質結構。利用了一個簡易P-N接面的構想,可以分別量測ZTO奈米線和P3HT奈米線以及P-N接面。由ZTO奈米線和P3HT奈米線線性的電流對電壓關係,可觀察到P-N接面的曲線。接著在照射氦氖雷射光下觀察到P3HT奈米線和P-N接面有光反應,且在P-N接面有太陽電池的現象,計算出光電轉換效率為0.17%。另外可由ZTO奈米線藉由P-N接面調控不同的上下電壓來阻絕電流的通過,如同三態緩衝器具有開關的特性。本篇論文主要是利用了一個簡易P-N接面的構想,可以分別量測ZTO奈米線和P3HT奈米線以及P-N接面。而利用此構想可製作奈米太陽能電池,並藉由量測計算出光電轉換效率,最後我們也發現P-N接面可以運用在數位邏輯上。
The investigation, characterization and application of materials with nanostructuresare important issues. In this work, p–n organic-inorganic, hetero-junction devices, composed of p-type conducting polymers(p3HT nanowire mesh) and n-type Zinc Tin Oxide (ZTO) NWs, were fabricated using e-beam lithography technique. The current-voltage (I-V) and field-effect measurements for ZTO NW, p3HT NW mesh, and the ZTO/p3HT junction were carried out. The I-V curve of ZTO/p3HT junction reveals a significant rectification manner. For ZTO NW and p3HT NW mesh, the majority carriers of n- and p-type, respectively, were determined. According to the slopes of current-gating voltage (I-Vg) curves in the turn-on region, the electron and hole mobilities of ZTO and p3HT NW mesh are decided to be 5.2×10-3 and 1.3×10-4 cm2/V-s, respectively. A novel peak observed in I-Vg curve of the ZTO/p3HT junction has been observed and it is ascribed to the superposition effects from the n-, p-channel, and the ZTO/p3HT junction. For the optoelectronic property investigation, the photo-response of ZTO NW, p3HT NW mesh and the ZTO/p3HT junction are measured under the shining of the He-Ne laser. The photo-response of the ZTO/p3HT junction shows the highest response.The result could come from the built-in electric field, which enhances photo-excited electron-hole pairs, in the p–n junction. Besides, the photovoltaic effect is also measured to be about 0.17%. On the other hand, p3HT NW mesh was used as a top gate.The top gate of the P3HT and the back gate of the silicon wafer are employed to control the channel current within ZTO NW.Our device demonstrates the operation of the three-stat buffer device in logic circuits.
URI: http://140.113.39.130/cdrfb3/record/nctu/#GT070052023
http://hdl.handle.net/11536/71896
Appears in Collections:Thesis


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