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dc.contributor.authorWang, Chung-Yien_US
dc.contributor.authorWu, Jieh-Tsorngen_US
dc.date.accessioned2014-12-08T15:09:21Z-
dc.date.available2014-12-08T15:09:21Z-
dc.date.issued2009-06-01en_US
dc.identifier.issn1549-8328en_US
dc.identifier.urihttp://dx.doi.org/10.1109/TCSI.2008.2008477en_US
dc.identifier.urihttp://hdl.handle.net/11536/7142-
dc.description.abstractThis paper describes a timing-skew calibration technique which equalizes the phase spacings among multiphase clocks. The scheme uses simple sample-and-hold circuits controlled by the multiphase clocks to sample a common reference input. Phase spacing is measured by counting the number of zero crossings between two adjacent sampling sequences. A zero-crossing detection scheme is proposed. It has better immunity against the offsets of the comparators used in the detector. A digital calibration processor is also proposed. It examines the outputs from the zero-crossing detectors, and then adjusts the delays of clock buffers in order to minimize timing skews. The proposed calibration scheme does not demand stringent requirement for the reference input. Its application to a eight-channel 6-b time-interleaved analog-to-digital converter is demonstrated.en_US
dc.language.isoen_USen_US
dc.subjectAnalog-digital conversionen_US
dc.subjectcalibrationen_US
dc.subjectclocksen_US
dc.subjectphase estimationen_US
dc.subjecttime-interleaveden_US
dc.subjecttiming circuitsen_US
dc.subjecttiming skewen_US
dc.titleA Multiphase Timing-Skew Calibration Technique Using Zero-Crossing Detectionen_US
dc.typeArticleen_US
dc.identifier.doi10.1109/TCSI.2008.2008477en_US
dc.identifier.journalIEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERSen_US
dc.citation.volume56en_US
dc.citation.issue6en_US
dc.citation.spage1102en_US
dc.citation.epage1114en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000267435200003-
dc.citation.woscount15-
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