標題: 一全數位式紅外線傳收系統之設計與FPGA實現
Design and FPGA Implementation of an All-digital Infrared Wireless Transceiver System
作者: 林家弘
Jar-Hom Lin
鄭木火
Mu-Huo Cheng
電控工程研究所
關鍵字: 紅外線;鎖相迴路;鎖相狀態機;Infrared;Phase-locked loop;State machine;NRZ;FPGA
公開日期: 2002
摘要: 紅外線無線傳輸為二電子裝之間點對點的通訊技術。由於紅外線元件價格便宜與構造簡單,所以廣泛應用在各類家電控制及資訊設備的資料傳輸。本論文設計一全數位式高速紅外線傳送系統,並以FPGA實現。在此設計中,如何解決傳收系統之同步是一重要關鍵。 傳統上,解決同步的問題,大都是利用鎖相迴路。然而,鎖相迴路需要有類比元件才能實現。所以我們提出鎖相狀態機的方法,在一個NRZ(Non Return to Zero)訊號週期內,將訊號同步。而且此方法能以簡單的數位電路實現。我們使用型號FLEX10K100ARC240-1其振盪頻率為32MHz的FPGA,成功地實現全數位式2Mbit/s紅外線無線傳輸傳收模組,在相距1.5公尺內,可正確傳收訊號。
The infrared wireless transceiver is the point-to-point communication between electronic devices. It can be widely applied to control electric appliances and to carry information since the infrared element is inexpensive and simple. This thesis designs a high-speed all-digital infrared wireless transceiver system and presents a FPGA implementation. The key contribution of this thesis is to propose an all-digital phase-locked system to maintain the synchronization between the electronic appliances. In convention, this problem is solved by using the phase-locked loop, the realization of which offen needs analogy elements. We propose a phase-locked system designed by the concept of state machine. This system requires only digital elements for implementation and can obtain acquisition within the period of one transition of the NRZ signal. We use the FPGA, FLEX10K100ARC240-1, with the system clock of 32MHz to realize an 2Mbit/s infrared wireless transceiver module. Experiments show that the transeciver works correctly when the distance between devices within 1.5m.
URI: http://140.113.39.130/cdrfb3/record/nctu/#NT910591045
http://hdl.handle.net/11536/71026
Appears in Collections:Thesis