Title: Hardware Architecture for High-Performance Regular Expression Matching
Authors: Lee, Tsern-Huei
電信工程研究所
Institute of Communications Engineering
Keywords: Hardware acceleration;nondeterministic finite automaton;regular expression
Issue Date: 1-Jul-2009
Abstract: This paper presents a bitmap-based hardware architecture for the Glushkov nondeterministic finite automaton (G-NFA), which recognizes a given regular expression. We show that the inductions of the functions needed to construct the G-NFA can be generalized to include other special symbols commonly used in extended regular expressions such as the POSIX 1003.2 format. Our proposed implementation can detect the ending positions of all substrings of an input string T, which start at arbitrary positions of T and belong to the language defined by the given regular expression. To achieve high performance, the implementation is generalized to the NFA, which processes K symbols in each operation cycle. We provide an efficient solution for the boundary condition when the length of the input string is not an integral multiple of K. Compared with previous designs, our proposed architecture is more flexible and programmable because the pattern matching engine uses memory rather than logic.
URI: http://dx.doi.org/10.1109/TC.2008.145
http://hdl.handle.net/11536/7073
ISSN: 0018-9340
DOI: 10.1109/TC.2008.145
Journal: IEEE TRANSACTIONS ON COMPUTERS
Volume: 58
Issue: 7
Begin Page: 984
End Page: 993
Appears in Collections:Articles


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