標題: 二氧化鉿薄膜製備與鉿污染研究
The Study of the Preparation of MOCVD HfO2 and Hf Contamination Effect
作者: 梁建翔
Jann-Shyang Liang
Bing-Yue Tsui
關鍵字: 二氧化鉿;hafnium
公開日期: 2002
摘要: 本論文在針對以有機金屬化學氣相沈積技術製備二氧化鉿(HfO2)薄膜的製程參數對電性以及物性的影響進行研究,包括沉積條件、電極材料、前處理方式及沉積後退火處理方式等等。對於鉿金屬在製程中進入元件區可能造成的金屬污染的影響,也做了一系列的探討,藉此澄清鉿金屬對於元件特性影響的疑慮。 在二氧化鉿電性研究方面,易形成金屬氧化物之材料,如鋁金屬,不適合作為閘極材料,複晶矽也會在後續高溫製程中與二氧化鉿形成介面層。鉑以及鉭鉑合金都是適當的閘極材料。在經過氨氣高溫表面處理的晶片上可以得到比較薄的等效二氧化矽厚度,但是電容-電壓特性會因為界面極化而有遲滯現象。快速熱氧化表面處理處理的晶片不會有遲滯現象,漏電流較低,但是等效二氧化矽厚度會增加。但如果薄膜的沉積條件較佳的話,漏電流受到前處理的影響較小。 薄膜如果是在高溫以及足夠氧氣流量下沈積,其漏電流會比在低溫或是氧氣流量較低的情況下低數個數量級。摻雜氮原子進入薄膜雖有助於薄膜結晶溫度的提升,但是卻會增加漏電流。微結構分析顯示,漏電流與薄膜表面的平整度較無關係。經高溫退火(攝氏1000度),界面層厚度是造成漏電流降低的原因;經過中溫退火(攝氏800度以下),結晶狀態是影響二氧化鉿薄膜漏電流的主因。薄膜部分結晶會使得漏電流增加,但是完全結晶化的薄膜反而有最低的漏電流。推測是因為薄膜中含有雜質,若雜質濃度較高,結晶化時,雜質被排出晶粒,當晶粒界雜質濃度過高,晶粒成長被抑止,因此僅能達成部分結晶化。由於前導物含氮,主要雜質為氮,而氮化鉿是導體,故造成較大的漏電流。高溫以及充分的氧可以促進前到物分解以及氧化完全,故可完全結晶化且漏電流最低。 在鉿污染研究方面,鉿金屬很重,在離子植入的時候不易被撞入基板深處,加上擴散係數極低,二極體以及金氧半電容結構都沒有發現鉿金屬對元件的影響。這表示不需要在閘極蝕刻後立即去除剩餘的二氧化鉿,對元件製程整合提供較大的彈性。 本論文對二氧化鉿薄膜沈積參數對特性的影響有完整以及深入的探討,也提出全新的漏電流機制,加上對及金屬污染疑慮的澄清,是未來研究工作以及實際應用之重要基礎。
In this thesis, the electrical and material characteristics of HfO2 deposited in a metal-organic chemical vapor deposition system are evaluated comprehensively. The influence of process parameters including gate electrode material, pre-deposition treatment, deposition temperature, deposition ambient, and post-deposition annealing are all studied. The Hf contamination from the HfO2 film during the post-deposition processes is also discussed. Metal with high heat of formation for metal oxide, for example Al, will react with HfO2 film to form interfacial layer and is not suitable gate electrode material. Poly-Si also reacts with HfO2 to form interfacial layer during high temperature processes. Both Pt and Ta-Pt alloy are good candidates. The HfO2 deposited on NH3-treated surface exhibits thin capacitance effective thickness (CET) but visible hysteresis phenomenon. Rapid thermal oxidation treatment results in low leakage current and negligible hysteresis phenomenon but thick EOT. It is also observed that if the HfO2 film is good enough, the effect of surface treatment becomes less important. Furthermore, surface roughness plays minor role on leakage current. Higher deposition temperature and purer O2 ambient are benefit to the leakage current performance under the same CET. Nano-crystals were observed in films deposited at any conditions. For HfO2 films deposited at low temperature or with insufficient O2 supply, the nano-crystals are separated by amorphous region and show round shape. It is postulated that the boundary of these nano-crystals contains high concentration impurities especially nitrogen. The HfN-like boundary layer accounts for the leakage current of these samples. Hf-precursor decomposes completely during high temperature deposition, and therefore, with sufficient O2 supply, the film becomes polycrystalline completely. The lack of high impurity boundary layer results in very low leakage current. By adding N2O gas, the deposition rate is reduced and the crystallization temperature is increased. But due to the incorporation of more nitrogen into the film, leakage current is higher than the samples deposited in pure O2 ambient. After high temperature PDA, the interfacial layer becomes thick enough to block carrier transport. Therefore, leakage current decreases for samples deposited at any condition. In the second part of this thesis, we used p+n junction diode and MOS capacitor to investigate the effect of post-HfO2 deposition process on device characteristics. Although hafnium is knocked-into silicon and PE-TEOS oxide, it only locates at the very shallow surface of substrate due to its heavy weight. The diffusivity of hafnium is very low both in silicon and silicon dioxide so that we could not observe the effect of hafnium in this experimental structure. All of these results imply that from the contamination point of view, the HfO2 beyond gate electrode need not be removed immediately after gate patterning. This observation greatly relaxes the restriction on device process integration.
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