Fabrication and Characterization of High-Performance Low Temperature Polycrystalline Silicon Thin Film Transistors
|關鍵字:||低溫多晶矽;薄膜電晶體;準分子雷射退火;金屬誘導側向再結晶;low temperature polycrystalline silicon (LTPS);thin film transistor (TFT);excimer laser annealin (ELA);metal induced lateral crystallization (MILC)|
|摘要:||此論文中探討了多項製作高性能低溫多晶矽薄膜電晶體之技術，其最高製程溫度介於450°C與600°C之間，並提出多項改善方法及技術以期進一步提昇低溫多晶矽薄膜電晶體之電特性，包含了多項非晶矽薄膜的結晶技術與元件結構及製程方式的簡化與改進，而其中又以非晶矽薄膜的結晶技術為主要重點。首先我們探討了以準分子雷射退火結晶方式製作出的低溫多晶矽薄膜電晶體的各項電特性，並從材料分析的結果推究電特性與準分子雷射製程條件上的關係。其中以雷射能量密度對多晶矽薄膜的晶粒大小與低溫多晶矽薄膜電晶體的電特性影響最大，而增加雷射掃描密度與雷射掃描之基板溫度可增進薄膜電晶體的電特性與均勻性。由於形成大晶粒的雷射製程範疇相當狹窄，加上雷射本身的不穩定性，因此所製作出的低溫多晶矽薄膜電晶體的電特性十分不均勻。然而p型通道的元件電特性之均勻性卻較n型通道的元件為佳，其中的原因與電子與電洞傳導機制上的不同有關。經由最佳化準分子雷射的製程條件，n型通道與p型通道低溫多晶矽薄膜電晶體的場效載子移動率可分別達到210 cm2/V*s與90 cm2/V*s。電漿處理雖然能夠有效減少雷射退火後多晶矽薄膜的缺陷密度使得多晶矽薄膜電晶體的電特性進一步提昇，不過卻有其極限，因此提高多晶矽薄膜的結晶性質才是提昇低溫多晶矽薄膜電晶體電特性的根本解決之道。
在鎳金屬誘導側向結晶的研究中，我們探討了多項影響側向結晶速率與品質的因素，包含了非晶矽薄膜的厚度、結晶時退火的溫度、非晶矽薄膜的微結構狀態、鎳金屬沉積區域的形狀及大小、及鎳金屬沉積的厚度。其結果顯示，在鎳金屬誘導側向結晶過程中以400 Å左右的非晶矽薄膜厚度所形成的多晶矽薄膜具有較佳的晶向一致性，並具有一合理的結晶速率，而利用其所製作出的低溫多晶矽薄膜電晶體亦具有較佳的電特性與一致性。鎳金屬沉積區域的形狀與大小及其與元件通道間的相對位置亦對薄膜電晶體的電特性有不小的影響，一個理想的佈局及製程條件為使用細長的鎳金屬沉積區域並搭配極薄的鎳金屬沉積來獲得一合理的結晶速率與較佳的結晶狀態並使得金屬污染降至最低。經由最佳化鎳金屬誘導側向結晶的佈局及製程條件，低溫多晶矽薄膜電晶體的場效載子移動率可達到100 cm2/V*s以上，而開關電流比亦高於107。
為了進一步提高多晶矽薄膜的結晶性質與提昇低溫多晶矽薄膜電晶體之電特性，並改善傳統準分子雷射退火結晶與鎳金屬誘導側向結晶的缺點，本論文接著提出兩種新穎的結晶方式。其一為結合鎳金屬誘導側向結晶及準分子雷射退火結晶來形成結晶性佳之大晶粒多晶矽薄膜。鎳金屬誘導側向結晶用來形成大晶粒但結晶性差之多晶矽薄膜，而後續的準分子雷射退火則用來降低晶粒裡的缺陷。利用此一方式所製作出之低溫多晶矽薄膜電晶體具有300 cm2/V*s以上的場效載子移動率，且具高度的均勻性。另外一個則利用一新穎之結構來達到控制晶粒橫向成長的目的；此一結構在局部區域產生兩種不同厚度的非晶矽薄膜，當準分子雷射照射在此一結構上並使得較薄區域完全熔融時，晶粒便會在凹陷的薄區做橫向成長，而隨著雷射能量密度的增加，其橫向成長的區域也將進一步擴大。若薄區之非晶矽薄膜厚度為1000 Å，則可約形成3 mm長之長型晶粒。此一結晶方式的另一優點為可以在想要的區域上控制晶粒的橫向成長，如此一來低溫多晶矽薄膜電晶體電特性之均勻度便可大幅提高。而藉由控制凹陷區域的長度，當雷射能量密度大於某一特定值時，可使得晶粒成長長度不受雷射能量密度的影響，進而改善雷射製程的範疇。利用此結構，在理想狀況下，一個雷射脈波便足以在凹陷區域形成大晶粒；相較於傳統方式的準分子雷射退火結晶必須利用增加雷射掃描密度來提高晶粒尺寸與均勻性，此一結晶方式可大幅提高雷射製程的產率。而經由雷射製程的最佳化，利用此結晶方式所製作出低溫多晶矽薄膜電晶體其場效載子移動率可達到500 cm2/V*s以上，開關電流比則高於1010，且具高度的均勻性，因此非常適用於未來system-on-panel (SOP)的應用。
In this thesis, various techniques for fabricating high-performance low temperature polycrystalline silicon (LTPS) thin film transistors (TFTs) are studied, in which the maximum process temperature is between 450°C and 600°C. Many methods have been proposed to further improve the performance of LTPS TFTs, which include techniques of crystallizing a-Si thin films, modifying the device structures, and simplifying the process procedures, while most of the effort is focused on crystallization of a-Si thin films. First, the electrical characteristics of LTPS TFTs fabricated by excimer laser crystallization (ELC) of a-Si are studied in detail. From the results of material analysis and device characterization, the relation between electrical characteristics of LTPS TFTs and laser process conditions has been identified. It is found that the laser energy density has a most profound influence on the resulting poly-Si thin films and electrical characteristics of LTPS TFTs. Increasing laser shot density per area and substrate temperature can improve the crystalline quality and uniformity of crystallized poly-Si thin films, and consequently result in LTPS TFTs with better performance. The LTPS TFTs fabricated by ELC suffer from poor uniformity of electrical characteristics due to the narrow laser process window for producing large-size grain, pulse-to-pulse variation of laser fluence, and spatial non-uniformity of laser beam. However, the uniformity of p-channel LTPS TFTs is much better than that of n-channel counterparts. The possible reason may be attributed to the difference in the conduction mechanism between electron and hole in laser-crystallized poly-Si. By optimizing the laser process conditions, field effect mobility of 210 and 90 cm2/V*s can be achieved for n-channel and p-channel ELC LTPS TFTs, respectively. Although the performance of ELC LTPS TFTs can be effectively further improved by plasma passivation, however, the essential solution to enhance the performance of LTPS TFTs is to produce high-quality poly-Si thin film by elaborating the crystallization process. In the study of nickel metal induced lateral crystallization (Ni-MILC), many factors that will affect the crystallization rate and the quality of resulting poly-Si thin films are investigated, which include the thickness of a-Si, crystallization temperature, precursor of a-Si, shape and size of Ni seeding window, and the deposited Ni thickness. The results reveal that Ni-MILC poly-Si thin film with a thickness of about 400Å shows good crystalline uniformity within the thin film layer accompanying with a reasonable crystallization rate, and Ni-MILC LTPS TFTs fabricated using 400-Å Ni-MILC poly-Si thin film exhibit better performance and uniformity. The electrical characteristics of Ni-MILC LTPS TFTs are also found to be related to the layout methodology of Ni seeding window. Long-strip Ni seeding window along with an ultra-thin Ni film is suggested in the fabrication of uniform high-performance Ni-MILC LTPS TFTs with low leakage current in order to reduce metal contamination and obtain a reasonable crystallization rate. By optimizing the Ni-MILC process, Ni-MILC LTPS TFTs with field effect mobility of 100 cm2/V*s and on/off current ratio over 107 have been achieved. In the study of device structure modification and process simplification, two novel methods of producing self-aligned graded lightly doped drain (LDD) structure have proposed in this thesis. The processes are simple compared to the previous ones. The feature of the two proposed processes is to utilize laser irradiation to activate dopants and, simultaneously, diffuse dopants laterally. As a result, a grade LDD structure is formed after laser irradiation. The LTPS TFTs fabricated by the two processes exhibit ultra low leakage current, high on/off current ratio, reduced kink current, and high reliability due to the great reduction of electric field near the drain junction. In order to further improve the quality of crystallized poly-Si thin films and the performance of LTPS TFTs, and avoid the drawbacks of conventional ELC and Ni-MILC process, two novel crystallization methods are subsequently proposed. The one is to combine the Ni-MILC and ELC process to produce high-quality and large-grain poly-Si thin films. The Ni-MILC process is used to produce a poly-Si thin film with very large but defect-rich grains and the post ELA process subsequently reduces the intra-grain defects while keeping the grain size large. LTPS TFTs with field-effect mobility exceeding 300 cm2/V*s have been fabricated by using this method, while exhibit good uniformity. The other one utilizes a novel structure to control the lateral grain growth. In this method, the a-Si thin film with two kinds of thicknesses in a local region is utilized for excimer laser irradiation. As a proper laser fluence is applied on the a-Si thin film, in which the thin part of a-Si is completely melted, a large lateral temperature gradient will exist between the complete melting Si and partial melting Si, and the grains will grow laterally from the un-melting solid Si seeds in the thick part of a-Si towards the thin region where the Si is completely melted. It is found that large longitudinal grains about 3 mm long can be produced in the recessed region by using 1000-Å a-Si in the recessed region and optimizing the laser energy density. Another advantage of this process is that the large and uniform longitudinal grains can be artificially produced in the desired local region, which will result in uniform performance of LTPS TFTs. Moreover, a wide laser process window is also shown in this process, and ideally a single laser shot is sufficient to induce the lateral crystallization, which makes a great improvement on process throughput. By optimizing the laser process conditions, ultra-high- performance and uniform LTPS TFTs with field-effect mobility exceeding 500 cm2/V*s, and high on/off current ratio more than 1010 can be fabricated by this novel crystallization method. As a result, it is very suitable for future system-on-panel (SOP) applications. At last part of this thesis, the instability mechanisms and degradation phenomena of hydrogenated LTPS TFTs on poor thermal-conducting quartz substrates are investigated in detail with various bias stress conditions and TFT channel widths. Self-heating and hot carrier degradation are found to be the two dominant degradation mechanisms which depend on bias stress conditions. A depassivation/passivation phenomenon is also found in hydrogenated LTPS TFTs during device operation, which results from the movement of hydrogen ions along the channel according to the bias favor. Self-heating has been proven to be the major factor for enhancing such a phenomenon. Finally, the suppression of hot carrier degradation by the self-heating effect is also observed in devices with a large channel width when the current during the hot carrier stress was sufficiently high. In this case, self-heating becomes the dominant degradation mechanism and the electrically reversible depassivation/passivation phenomenon also occurs.