Using ECR-plasma Processing Technology to Investigate the RIE-treated Surface and to Form the Gate Dielectric and Passivation Insulator for GaN Application
第二部份使用了電子迴旋共振化學氣相鍍膜設備在n型氮化鎵上沉積高品質的氮化矽膜，製程溫度僅300°C，但是所得的氮化矽膜的介電特性及光學性質均逼近一般在800°C低壓化學氣相沉積所得的薄膜，適於作為金屬-絕緣體-半導體場效電晶體的絕緣介電層，經由Termann電容電壓關係的分析方法，我們量得其固定電荷(fixed charge)密度為負的1.1x1011 cm-2，介面補捉電荷(interface trapped charge)密度平均在4x1011 cm-2eV-1以下，而在導帶邊際下方0.6 eV處有最低值5x1010 cm-2eV-1。電流電壓特性量得此金屬-絕緣體-半導體的二極體結構擁有不錯的崩潰電場值11.6 MV/cm，即使在350°C環境下仍有5.7 MV/cm，與目前已發表的其他材料與製作方法相比，有製程簡易，同時達到低電荷量與高崩潰電場的特性，而且過程的熱預算(thermal budget)最低，能避磊晶層間的擴散現象。
第二部份另一單元延伸之前的成果，運用紫外光照射於電容二極體在深空乏狀態時，來不及隨電壓變化而反應的介面補捉電荷會被激發釋放，這會產生電容電壓曲線的平移，我們從此平移量求出介面補捉總電荷密度為7x1011 cm-2，可大約換算為3x1011 cm-2eV-1，與前一單元使用Termann分析的結果接近，所以無論介面補捉電荷的反應時間為何，密度值都在4x1011 cm-2eV-1左右。這單元朝向金屬-絕緣體-半導體場效電晶體元件的整合製造方向前進，初步的結果顯示，利用氮化矽絕緣膜作為閘極介電層，對通道電荷量有良好的控制，Auger電子深度分析也顯示閘極介面完整陡峭。在元件間的隔絕方面，可使用氧離子的離子佈值方法與其他製程模組整合起來。
GaN is a highly potential semiconductor material with the properties of wide bandgap (3.4 eV), high breakdown electric field, high carrier mobility and fair thermal conductivity. It is not only applied widely in the blue and green light emitting diodes (LEDs), but also regarded as the key material to fulfill the next generation DVD laser diodes (LDs). In the aspect of high power electronics and microwave communication, it also attracts much attention and intensive research. However, the processing technologies are not as mature as those developed in Si and GaAs materials. There are a number of obstacles to be overcome before these advanced devices are commercially available. In this thesis, we used the electron cyclotron resonance principle to generate high-density plasma at such a low pressure of 1 mTorr for etching GaN and chemically depositing silicon nitride dielectric films. There are three aspects under investigation accompanied by other facilities. First of all, we focused upon the effect of dry etching on the ohmic contact to p-type GaN and surface properties. Secondly, silicon nitride film was used as the gate dielectric for GaN-based metal-insulator-semiconductor field effect transistors (MISFETs). The characteristics were assessed and compared with other gate materials. At last, the silicon nitride film was deposited at low temperatures for passivation of LEDs practically. We found that the packaging yield was greatly increased and the light output was enhanced with this passivation procedure. In Part 1, the p-type layer of a GaN-based LED wafer was etched by the ECR-RIE etcher and then Ni/Au alloy was used as the ohmic contact. The post-etch treatments included N2 plasma treatment and rapid thermal annealing. The variation of contact characteristics was observed by current-voltage (I-V) curves. The main purpose was to find an easy way to recover the degradation of contact properties followed by dry etching on the p-type base layer when heterojunction bipolar transistors (HBTs) were fabricated. We found that the contact performance was getting worse significantly after the dry etching treatment. The original linear curve became a nonlinear one similar to the I-V characteristics of Schottky barriers. The RTA treatment at 700°C for 3 minutes would improve the performance very much, but RTA at other temperatures and N2-plasma treatment could not have this effect. The RIE treatment would damage the surface lattice structure and produce N vacancies, which transform the surface into n-type GaN. In addition, the damaged surface tended to adsorb oxygen, even though the samples were kept in N2 ambiences. From grazing incident angle X-ray diffraction (GIXD), atomic force microscopy (AFM), X-ray photospectroscopy and photoluminescence (PL) analyses, RTA at 700°C could cause the reconstruction of the surface lattice and the decrease of oxygen content. Although the N2 plasma treatment supplemented the nitrogen loss caused by RIE, these added atoms could not form effective bonds with the surface and easily escape again in the alloying process. In Part 2, we used ECR-CVD to deposit a high-quality silicon nitride film at 300°C. The dielectric and optical properties of an obtained film were close to the film deposited by low pressure chemical vapor deposition at 800°C. This film is adequate to be the gate dielectric of MISFET. By the analysis of Termann method, the capacitance-voltage (C-V) result showed that the negative fixed charge density was 1.1x1011 cm-2, and the interface trapped charge density was lower than 4x1011 cm-2eV-1. The lowest value appeared to be 5x1010 cm-2eV-1 at 0.6 eV below the conduction band edge. From I-V measurement, the MIS-diode exhibited a high breakdown field of 11.6 MV/cm. Even at 350°C, the breakdown field was higher than 5.7 MV/cm. Compared with the materials that have been published so far, the silicon nitride gate dielectric has the advantages of simple structures, high breakdown field as well as low interface charge densities. Moreover, the whole process consumes little thermal budget and can prevent the diffusion between different epitaxial layers. In the other chapter of Part 2, we utilized another method to confirm the result from Termann analysis. The MIS capacitor, driven into deep depletion region, .was exposed to UV light illumination from a GaN LED. The interface trapped charges, which could not catch up the sweeping voltage, were excited and released from the trap sites. This would cause the C-V curve shift, and the average charge density could be obtained from this shift. The value is 3x1011 cm-2eV-1 and close to the result in the former chapter. The technologies involved in the process integration of MISFET were also proposed. The initial result demonstrated that the channel conductance was controlled well by the gate voltage. From Auger electron analysis, the interface between the dielectric and the semiconductor was steep and apparent. Oxygen ion implantation was used as the isolation method that can endure the normal operating temperature. In Part 3, we still utilized ECR-CVD to deposit silicon nitride films for LED passivation. The deposition temperature was as low as room temperature, and the lift-off technique could be adopted to be compatible with the original fabrication steps. The packaging yield was raised and the light output was enhanced by 6% with the passivation layer. Besides, the reliability with high temperature and humidity tests was improved.