標題: 多媒體串列處理器之微架構模擬器
A Micro-architecture Simulator for Multimedia Stream Processor
作者: 林芳如
闕河鳴
電信工程研究所
關鍵字: 架構模擬器;architecture simulator
公開日期: 2005
摘要: Stanford針對多媒體應用程式發展出一個可程式化的處理器Imagine。 由於可程式化的Stream Processor針對不同的應用程式所適用的硬體架構會有所不同,利用硬體實現各種不同的架構並且比較執行的效能,不但耗費很長的時間,硬體製作的成本也非常的昂貴。 根據不同的多媒體應用程式,如何決定可程式化Stream Processor的硬體架構,是一大難題。 然而現今的硬體加速電路,大部分都是針對特定的用途而設計,其硬體架構的設計是針對特定的應用程式,才能達到很好的執行效能。 在本論文中,將提出一個架構的模擬器,模擬多媒體應用程式在不同架構上的執行效能,並分析硬體的使用率以及記憶體使用的容量。 比較應用程式在各種架構上的執行效率,挑選出最適合的硬體架構。 決定最佳化的硬體架構之後,可程式化的Stream Processor再用硬體去實現。 各式各樣的多媒體應用程式,利用架構模擬器找出最佳化的硬體架構,再搭配可程式化的Stream Processor將硬體實現,不但省下了硬體製作成本;速度相較於使用硬體實現來測試也加快許多。
A programmable processor, Imagine, has been developed especially for media applications by Stanford. Since a programmable Stream Processor would build various hardware micro-architectures for diverse media applications, the cost of time and money could be huge to implement various micro-architectures on hardware and then compare their efficiencies. Therefore, how to construct suitable micro-architectures of programmable Stream Processor for diverse media applications is a great challenge. Nowadays, most of the hardware accelerators are designed for dedicated application. Only when the hardware micro-architecture is carefully designed for particular media application could the stream processor achieves exceptional performance. For the purpose of resolving this dilemma, in this paper, we develop the micro-architecture simulator for stream processor. The micro-architecture simulator is expected to simulate the performance of media application executed on various micro-architectures, and then to analyze the utility rate of hardware and consumption of memory. By comparing the performance of media application executed on diverse micro-architectures, the optimized hardware micro-architecture can be determined and then the programmable Stream Processor can be implemented on hardware. By utilizing micro-architecture simulator to settle down optimized problems and then implement hardware with programmable Stream Processor for diverse applications, this idea saves not only huge cost of money on hardware, but also plenty of time for testing.
URI: http://140.113.39.130/cdrfb3/record/nctu/#GT009213588
http://hdl.handle.net/11536/70301
Appears in Collections:Thesis


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