標題: 基因演算法在深次微米MOSFET元件參數萃取與模擬之應用A Genetic Algorithm for Deep-Submicron MOSFET Parameters Extraction and Simulation 作者: 陳正凱Cheng-Kai Chen孫春在李義明Chuen-Tsai SunYiming Li資訊科學與工程研究所 關鍵字: 參數萃取;基因演算法;金氧半場效電晶體;系統整合晶片;parameter extraction;Genetic algorithm;MOSFET;SOC 公開日期: 2001 摘要: 基因演算法自從被發表以來，已經被廣泛的應用在各種領域中，如最佳化設計、超大型積體電路佈線設計、系統穩定控制、圖形識別、影像處理﹒﹒﹒等等，在本篇論文中，我們嘗試將基因演算法應用在深次微米MOSFET元件的模式參數萃取上，傳統設計超大型積體電路時，設計師如何設定電路模式中的各個物理參數，使其電路特性(如電流-電壓曲線圖)符合所需，往往是個非常困難的問題，我們透過基因演算法，自動、快速、準確地萃取出最適當的參數設定，大大的降低元件及電路的開發成本，而這套開發完成的自動化萃取參數的流程，以MOSFET元件與電路作為探討範例，模擬結果與實驗數據相比較，呈現它的高精確度及方法的極佳效率性，更可以應用在不同的元件設計上，如：奈米元件電路設計、系統整合晶片設計、RF高頻元件電路設計﹒﹒﹒等等。Genetic algorithm is a stochastic-based optimization strategy with its randomly but systematically search strategy which is usually applied for solving complex problem, such as simulated model parameters extraction. To characterize the properties of MOSFET accurately, various compact models have been proposed for deep-submicron and nanoscale MOSFET device simulation. Each model consists of diverse governing equations and parameters. It leads to a multivariable optimization problem to be solved and extracted efficiently for the device applications. Different approaches, for instance the direct method and numerical method have been applied to extract and optimize the model parameters. In this work we present a unified multi-objective evolutionary approach for BSIM3 MOSFET model parameter extraction. In contract to conventional time-consuming large-scale approach, our genetic algorithm includes: (1) a physical-based weight function; (2) floating-point operators; and (3) dynamic mutation techniques, and solves the problem efficiently. The proposed method outputs a set of optimal parameters for device simulation; in our simulation experiences, this method is stable and accurate. Comprehensive comparisons among models are reported for the parameters sensitivity test. Simulations and measurements for sub-micron MOSFETs compact models are examined to show the accuracy and robustness of the method. The developed CAD tool can be further applied to extract nanoscale MOSFTEs parameters for advanced VLSI circuit design and SOC applications. URI: http://140.113.39.130/cdrfb3/record/nctu/#NT900394092http://hdl.handle.net/11536/68620 Appears in Collections: Thesis