標題: 先進材料應用於複晶矽薄膜電晶體之研究
A Study of Low-Temperature Polycrystalline Silicon Thin Film Transistors Using Advanced Materials
作者: 楊明瑞
Yang, Ming-Jui
簡昭欣
黃調元
Chien, Chao-Hsin
Huang, Tiao-Tuan
電子研究所
關鍵字: 高介電常數材料;複晶矽薄膜電晶體;High-K Materials;Poly-Si TFTs
公開日期: 2008
摘要: 在本論文中,我們利用了先進的高介電常數材料來製造高效能的低溫複晶矽薄膜電晶體。研究成果著重於探討利用新穎的分子氣相沉積(AVD)系統所成長出高介電薄膜的特性,並且利用此種新研發的薄膜來改善複晶矽薄膜電晶體的運作性能,最後並探討了這些高介電薄膜電晶體的可靠度。 首先,我們利用了一種新的分子氣相沉積系統來成長先進的高介電薄膜。在文章中,我們有系統地研究討論有關於各種參數對沉積薄膜的影響,其中包含了沉積溫度、腔體壓力、氧氣流量、注射頻率、以及薄膜成分調整等。而高溫的退火處理也被用來測試此高介電薄膜的熱穩定性。我們發現,要利用此種分子氣相沉積系統獲得高品質和化學當量比的高介電薄膜,較高的沉積溫度和充足的氧氣流量乃是必要的條件。在研究中,我們也發現擁有多晶結構的二氧化鉿(HfO2)薄膜會導致較大的漏電流;相對地,矽酸鉿(HfSiOx)薄膜則表現出比較優異的熱穩定度,在高溫退火處理後仍維持其非晶狀態的結構。當然,較二氧化鉿薄膜低的介電常數,則為矽酸鉿薄膜的缺點。另外,具有較低介電常數的介面層自然形成於高介電薄膜和矽基板之間,將會導致等效氧化層厚度降低的問題。 接著,我們嘗試將此新開發的高介電薄膜應用在低溫複晶矽薄膜電晶體上。在這個部份,我們首先探討較厚高介電薄膜的結構和電性;接著,我們針對使用二氧化鉿和矽酸鉿薄膜當作閘極介電層的低溫P型通道複晶矽電晶體作一系列的研究和探討。我們發現因為高介電薄膜具有較大的閘極電容密度,因此以其作為閘極介電層的薄膜電晶體都展現出比使用傳統沉積氧化層的元件較佳的特性,例如較高的開關電流比、較低的次臨界擺幅、和較低的臨界電壓,除了稍高的關閉狀態的漏電流。其中,使用矽酸鉿薄膜當作閘極介電層的薄膜電晶體,其場效遷移率是使用沉積氧化層的電晶體的1.76倍;但是,使用二氧化鉿當作閘極介電層的元件卻表現出劣化的遷移率。最後,針對通道長度、通道寬度和元件特性的相關性也會在此被討論。 此外,我們更深入地研究有關二氧化鉿薄膜電晶體遷移率劣化的機制。我們討論了其他發生散射的原因,其中可能是存在於二氧化鉿薄膜中和二氧化鉿薄膜與多晶矽通道介面間的缺陷電荷、固定電荷、微弱聲子(soft Phonon)、和薄膜結晶化所造成的。我們也研討了有關使用高介電薄膜當作閘極介電層的複晶矽薄膜電晶體所引起的嚴重漏電流現象。我們認為高介電薄膜所產生的較高電場是引發嚴重的閘極誘發汲集漏電流(GIDL)的原因,而場發射電流為其主要的漏電流機制。緊接著,我們利用了變溫量測和負電壓溫度不穩定(NBTI)的應力量測方法來測試使用各種不同閘極介電層的薄膜電晶體的可靠度;很明顯地,高介電薄膜電晶體展現了相較於傳統使用沉積氧化矽的薄膜電晶體優異的溫度免疫能力。而在這些使用不同高介電薄膜的元件中,使用矽酸鉿薄膜的電晶體更展現出在負電壓溫度不穩定應力測試下較二氧化鉿薄膜電晶體優異的容忍度,其中包含了臨界電壓飄移、次臨界擺幅劣化、場效遷移率劣化、以及驅動電流衰退等測試項目。因此我們相信,相較於二氧化鉿薄膜,矽酸鉿薄膜將會是較佳的未來高性能複晶矽薄膜電晶體閘極介電層材料。
In this thesis, advanced high-κ materials were employed to fabricate high-performance low-temperature polycrystalline silicon thin film transistors (TFTs). Most of the efforts were focused on exploring the deposition of high-κ films by the new atomic-vapor deposition (AVD) system, improving the performance of the poly-Si TFTs with newly-developed high-κ films, and studying the reliability of these high-κ TFTs. First of all, a new AVD system was employed for the deposition of the advanced high-κ materials. The impacts of deposition parameters, including the deposition temperature, chamber pressure, oxygen gas flow, injection frequency, and composition adjustment, were investigated systematically. The thermal stability of high-κ films was also tested by high temperature post-deposition annealing (PDA). It was found that higher deposition temperature and sufficient oxygen gas flow are essential to obtain the good quality and stoichiometric high-κ films by the AVD system. However, the large leakage current would be caused by the polycrystalline structure of HfO2 films. In contrast, HfSiOx films exhibit better thermal stability and retain the amorphous structure even after high temperature annealing. Certainly, the lower κ compared with HfO2 film is the disadvantage of the HfSiOx films. Besides, the native interfacial layer with lower κ value always exists between the thin high-κ gate dielectric and Si substrate, which defeats the purpose of EOT lowering. Next, we also tried to apply the newly-developed high-κ films to the low-temperature polycrystalline silicon (LTPS) TFTs. In this part, the structural and electrical properties of the thicker high-κ films were characterized first. Then, we performed a systematic study on the electrical properties of low-temperature-compatible p-channel poly-Si thin-film transistors (TFTs) using HfO2 or HfSiOx high-□ gate dielectric. Because of their higher gate capacitance density, TFTs containing the high-□ gate dielectric exhibit superior device performance in terms of higher Ion/Ioff current ratio, lower subthreshold swing (S.S.), and lower threshold voltage (Vth), relative to the conventional deposited-SiO2 counterparts, albeit with slightly higher OFF-state current. TFTs incorporating HfSiOx as the gate dielectric has 1.76 times the field-effect mobility (□FE) relative to that of the deposited-SiO2 TFTs. In contrast, the HfO2-TFTs exhibit inferior mobility. The device performance dependence on the channel length and width of poly-Si TFTs was also discussed. Furthermore, we also carefully investigated the mobility degradation mechanisms in these HfO2-TFTs. We discussed possible origins of the additional scatterings, which might be attributed to the trapped charges, fixed charges, soft phonons, and crystallization in the HfO2 films and HfO2/poly-Si channel interface. Moreover, the higher leakage current of poly-Si TFTs using high-κ gate dielectrics was also studied. Aggravated gate-induced drain leakage (GIDL) current was thought to arise from the higher induced electric field by the introduction of high-κ films, and field-emission current would be the dominant leakage mechanism. In addition, the reliabilities of these TFTs with different gate dielectrics were tested by the varying-temperature measurements and negative bias temperature instability (NBTI) stress. Obviously, the high-κ TFTs exhibit better temperature immunity over the conventional TFTs containing the deposited-SiO2 film. In comparison with the devices using different high-κ gate dielectrics, the immunity of HfSiOx-TFTs was better than that of HfO2-TFTs—in terms of Vth shift, SS degradation, □FE degradation, and drive current deterioration—against NBTI stressing. Thus, we believe that HfSiOx, rather than HfO2, is a better candidate as the gate dielectric material for the future high-performance poly-Si TFTs.
URI: http://140.113.39.130/cdrfb3/record/nctu/#GT009211805
http://hdl.handle.net/11536/67790
Appears in Collections:Thesis


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