Title: 全平面化低相位雜訊由電晶體控制的FSK調制器
ALL-Planar Low Phase Noise Transistor-Controlled FSK Modulator
Authors: 林韶正
Shao-Cheng Lin
Ching-Kuang C. Tzuang
Keywords: 振盪器;平面化;低相位雜訊;高功率;oscillator;FSK;planar;low phase noise;high power
Issue Date: 2000
Abstract: 本文展示的是一種新的震盪器設計方法,利用穩定圓的大小來達到頻率穩定的特性,而設計出一個高功率、低價位且單偏壓的PHEMT 壓控震盪源。我們稱為閘級開路壓控震盪器 ,被應用在FSK電路上。 該震盪器使用一個開關來當頻率控制器 ,相較於傳統的壓控電容式的設計 ,擁有較寬的頻寬。 此外,由於採用平面式波導共振腔來代替微帶線共振腔 ,帶來相位雜訊約8dB的改善。輸出功率為16.6 dBm ,且震盪頻率為15.1 GHz。量測到的相位雜訊是-85 dBc/Hz 在離主頻100KHz的地方。 f=50MHz,輸入位元速度為10M bit/s ,Vds=3.5V ,Ids=22mA ,功率控制超過15 dB ,效率至少達到百分之六十。
This thesis presents a novel design method of oscillator utilizing the location and size “Colpittslike” characteristic of stability circle. A high power and low cost single biased PHEMT VCO structure, called gate-opened oscillator, has been designed for FSK application. This VCO utilizes a switch as a frequency controller capable of wider bandwidth than traditional varactor-controlled case. In addition, applying a planar waveguide resonator as a comparison of microstrip line, can successfully reduce the phase noise about 8 dB .The oscillator output power is 16.6dBm and the oscillation frequency is 15.1Ghz.Measured phase noise is -85dBc/Hz at 100KHz offset from the carrier, f=50MHz, input bit rate is 10M bit/s, Vds=3.5V, Ids=22mA.The simulation results of power and frequency agree well with the measured result, in addition, the power control is more than 15 dB and efficiency is at least 60%.
Appears in Collections:Thesis