The reliability study of Poly-Si thin -film transistors
Utilizing polycrystalline silicon thin-film transistors (Poly-Si TFTs) as on-glass pixel switching elements and peripheral driver circuits is the future trend for fabricating active-matrix liquid-crystal displays (AMLCDs). The improvement of the electrical characteristic and the reliability of the low-temperature process Poly-Si TFTs are important issues. In this thesis, we proposed a new structure and studied the relibiality of the low-temperature process Poly-Si TFTs using the dynamic stress. In the first part, the dynamic stress on the low-temperature processed polycrystalline silicon thin-film transistors (poly-Si TFTs) is studied under two different stress conditions. As the falling time becomes short, the channel carriers can be accelerated to become hot and repelled from the channel region. Therefore, the device is seriously degraded by these hot channel carriers during the falling transient periods. It is also found that the degradation is more serious in the short channel device than that in the long channel one. In addition, as the stress frequency increases, the degradation is enhanced. Moreover, the reduced degradation under the high stress temperature is also expected to be related to the reduced hot carrier effect under the high temperature stressing. In the second part, we proposed a new structure with two sub-gate region, and we obtained that the slope variation and the threshold voltage shift of new structure were better than that of the conventional TFTs, and we are sure that they will improve substantially for the optimum condition for the new structure.