Applications of CF4 plasma pretreatment in the ULSI technology
Tzeng Hung Chi
Lee Chung Len
|Keywords:||CF4電漿;前置處理;能障下降;Ni矽化物;漏電流;CF4 plasma;pretreatment;barrier height;EEPROM;SILC;Ni silicide;leakage current|
|Abstract:||隨著可攜帶式電子產品的普及化，帶動系統整合晶片(SOC, System-on-a-chip)與非揮發性記憶體(Nonvolatile EEPROM memory)兩項技術的發展。在系統整合晶片中需要不同厚度的閘極氧化層，而非揮發性記憶體則需要降低操作電壓與功率消耗，這對氧化層的成長上都是相當困難且複雜的技術，有待進一步的研究。
As the portable electronic products becoming more and more popular, the SOC (System-on-a-chip) and nonvolatile EEPROM memory technologies are developed naturally. However, SOC technology is extremely complicated due to the fact that multiple thickness of gate oxide was needed. EEPROMs with lower operation voltages were also needed to save power consumption, but it is impractical to achieve by scaling down thickness of tunnel oxides. In this thesis, we propose a new kind of fluorinated oxides by CF4 plasma pretreatment. Barrier heights are reduced greatly, and then larger F-N tunneling currents are generated. Additional N2O annealing maintains those properties; by the way, the Qbd’s and the leakage currents characteristics are improved. Finally, Ni silicide formed on the CF4 fluorinated polysilicon was also studied. In forming silicide, Ni atom penetration will degrade the characteristics of devices. Especially in ULSI circuits, larger leakage currents produce excess heat to influence the reliability. In our experiments, CF4 plasma pretreatment could suppress the Ni penetration and decreases leakage currents of the oxides.
|Appears in Collections:||Thesis|