Fabrication of 0.15 μm T-shaped Gate by Electron-beam Lithography for Compound Semiconductor High-speed Device applications
Dr. Edward Y. Chang
|關鍵字:||電子束微影;T形閘極;Electron-beam Lithography;T-shaped Gate|
A process for fabricating 0.15 μm T-shaped gate using electron-beam lithography has been established. Bi-layer resist system using HI/LO sensitivity resist was used to provide T-shaped resist cavity with undercut profile suitable for lift-off process. The lithography and metallization process parameters of PMMA/P(MMA-MAA) bi-layer resist system has been determined in this work. The lateral exposure was used to increase the ratio of top layer opening to bottom layer opening. The T-shaped gate can improve GaAs FET performance because of the large cross-sectional area can reduce the gate resistance of the device. With the optimum exposure and development conditions, a 0.15 μm gate length T-shaped gate with top to bottom ratio of 7 can be obtained by PMMA/P(MMA-MAA) bi-layer resist system. The technology is applicable to compound semiconductor high-speed devices.
|Appears in Collections:||Thesis|