Title: 一個具有電流匹配之新電荷泵與低寄生雜頻之互補式金氧半5-GHz頻率合成器
A Low Spurious Tones of 5-GHz CMOS Frequency Synthesizer with New Current-Match Charge Pump
Authors: 許德賢
Te-Hsien Hsu
Chung-Yu Wu
Keywords: 頻率合成器;5-GHz;低寄生雜頻;電荷泵;電流匹配;互補式金氧半;Frequency Synthesizer;5-GHz;Low Spurious Tones;Charge Pump;Current-Match;CMOS
Issue Date: 2004
Abstract: 本篇論文是用台灣積體電路0.18um CMOS製程來實現一個5-GHz擁有低寄生雜頻之良好特性的頻率合成器。整個電路包含兩個具有良好電流匹配的電荷泵,能有效的降低寄生雜頻。整個迴路所產生的寄生雜頻能有效的抑制在小於 -69.52dBc。 此頻率合成器也搭配加上一個佈局面積較小的高速除法電路(÷2),此架構能比一般使用電感所組成的除法器擁有較少的花費。而這頻率合成器的輸出是以正交相位產生四個輸出,可應用在IEEE 802.11a 之RF通訊協定的傳輸與接收器上! 整個電路最高工作在5.62-GHz,且整個迴路最快能在13.5uS達到穩定。此頻率合成器的雜訊也壓制在小於 -107dBc。整個頻率合成器工作在1.8伏特與可程式控制除法器工作在1.4伏特時所產生的功率消耗小於18.8mW。
The thesis use TSMC 0.18um CMOS process to implement a 5-GHz frequency synthesizer that has perfect characteristic of low spurious tones. In this synthesizer which includes two perfect current-match of charge pump and they reduce spurious tones validly. The spurious sidebands at the center of adjacent channels are less than -69.52dBc. The frequency synthesizer collocate a small layout area of divide-by-2 divider, which structure of layout area and cost are smaller than other structure which like inductances loading type divider. The quadrature phase output of synthesizer can support IEEE 802.11a transceiver. The chip working frequency reach 5.62 GHz, and the loop settling time was small than 13.5uS. The frequency phase noise is restrained at -107dBc@1MHz. The chip total power is 18.8mW based on 1.4V power supply for program counter and swallow counter and 1.8V power supply for other block.
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