Study and the Performance and Reliability of Plasma-Passivated Polycrystalline Sillicon Thin-Film Transistors
Recently,Polycrystalline silicon thin film transistors are receiving lots of attention of their applications in active-matrix liquid crystal displays (AMLCDs) with on-glass integrated driver circuits. Grain boundaries exerts a profound influence on device performance. Therefore, reduction of defects in poly-Si films is required for realizing high performance poly-Si TFTs. There are two approaches that could be taken to reduce the grain boundary effects. One is to reduce the area of grain boundaries by enlarging the grain size in the poly-Si film. The other is to remove defect density at grain boundaries by passivation. However, poly-Si TFTs is subjected to the instability due to plasma passivation. In this thesis, disilane (Si2H6) gas was used to deposit amorphous silicon (a-Si) film by low-pressure chemical vapor deposition (LPCVD). Then, a-Si films were transferred to poly-Si films with larger graing size (~1 u m). The larger grain size is due to the higher disorder in these a-Si films. However, the crystallization time and incubation time is also longer. All devices were passivated by NH3 or N2O plasma treatments. It is found plasma passivation have been investigated to improve the electrical properties of poly-Si TFTs . The plasma passivation effects for SiH4-deposited and Si2H6-deposited poly-Si TFTs have been compared each other. It is clear that the field effect mobility 169.8 cm2╱V.sec, the on/off current ratio 8.07×108 can be achieved by the Si2H6-deposited poly -Si TFTs with NH3 plasma treatment. In addition, the gate bias stress, drain bias stress and hot carrier bias stresses were performed to examine the reliability of plasma-passivated popy-Si TFTs. It is found that hot carrier effects for the N2O plasma passivation on the poly-Si TFTs perform well than for the NH3 one.
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