標題: 半導體元件模擬之矩陣解法平行化Parallel Solution of Matrix Inversion for Semiconductor Device Simultaion 作者: 沈志哲Shen, Jev-Jyh郭雙發Shuang-Fa Guo電子研究所 關鍵字: 雙軛共梯度穩定;預調矩陣;截斷喬可利斯基分解;傳統多項式;柴比雪夫多項式;BiConjugate Gradient STablized;preconditioner;truncated Incomplete Choleski factorization;conventional polynomial;Chebyshev polynomial 公開日期: 1996 摘要: 本研究中,吾人使用康衛氏平行電腦,在PVM環境下實現了半導體元 件模擬中方程式平行化及格點平行化.方程式平行化乃同時解三個基本的 元件方程式,其速度提昇約1.52倍.因為係數矩陣的非對稱特性,吾人使用 具有更好收歛性的雙軛共梯度穩定(BiCGST)演算法.收歛速度速度取決餘 預調矩陣之選擇.本研究比較三種可平行化的預調矩陣,截斷喬可利斯基, 傳統多項式,柴比雪夫多項式. 格點平行化使用平行雙軛梯度穩定演算法.預調矩陣若採用截斷喬可利斯 基分解及傳統多項式,其性能幾乎相同,若採用柴比雪夫多項式則可減少 約1.24倍的計算時間.在循序計算下,平行演算法所需時間為循序演算法 的5.61倍,所以格點平行化,在PVM環境中使用6個處理器,其速度提昇 約1.72倍. In this work, we implement equation parallelization and grid-point parallelization for semiconductor device simulation using the CONVEX SPP-1000 parallel computer in the PVM environment. In equation parallelization, we solve the three basic equations concurrently. The speedup of equation parallelization is about 1.52. Because of the asymmetric characteristics of coefficient matrix, a BiCGST algorithm has been employed to achieve better convergence. The convergence speed is decided by the choice of the preconditioning matrix. Three parallel preconditioners: truncated IC factorization, conventional polynomial, and Chebyshev polynomial have been compared in this work. The grid-point parallelization is based on the parallel preconditioner in BiCGST algorithm. The truncated IC factorization and conventional polynomial preconditioners have almost the same performance. The Chebyshev polynomial preconditioner can reduce the computation time by a factor of 1.24.Because the CPU time required in parallel algorithm is longer than that required in serial algorithm by a factor of about 5.61 using sequential computation, the speedup of grid-point parallelization is only 1.72 using 6 processes in the PVM environment. URI: http://140.113.39.130/cdrfb3/record/nctu/#NT850428113http://hdl.handle.net/11536/61987 Appears in Collections: Thesis