標題: Strained Silicon Technology: Mobility Enhancement and Improved Short Channel Effect Performance by Stress Memorization Technique on nFET Devices
作者: Lu, Chih-Cheng
Huang, Jiun-Jia
Luo, Wun-Cheng
Hou, Tuo-Hung
Lei, Tan-Fu
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
關鍵字: CMOS integrated circuits;electron mobility;elemental semiconductors;field effect transistors;piezoelectricity;secondary ion mass spectra;silicon
公開日期: 2010
摘要: This paper presents a fundamental study of a stress memorization technique (SMT), which utilizes a capping nitride dielectric film to enhance negative channel field-effect transistor (nFET) device performance. SMT strain engineering is highly compatible with current standard complementary metal oxide semiconductor processes without introducing substantial additional complexity. In this work, we report that SMT-strained nFET exhibits a higher transconductance G(m_lin), which indicates strain-induced electron mobility enhancement. The nFET short channel effect is also improved by the SMT process. Improved V(t) roll-off characteristics manifest itself and are shown to result from retarded junction diffusion as indicated by secondary-ion mass microscopy analysis. Finally, this work demonstrates that when combined with a strained contact etch stop layer (CESL) technique, SMT provides additional strain beyond that provided by the CESL, which results in further improved nFET performance.
URI: http://hdl.handle.net/11536/6181
http://dx.doi.org/10.1149/1.3321948
ISSN: 0013-4651
DOI: 10.1149/1.3321948
期刊: JOURNAL OF THE ELECTROCHEMICAL SOCIETY
Volume: 157
Issue: 5
起始頁: H497
結束頁: H500
顯示於類別:期刊論文


文件中的檔案:

  1. 000276555300058.pdf