標題: 二維轉換之超大型積體電路設計與製作VLSI Implementation of 2D Transform Processor 作者: 陳茂龍Maw-Long Chen溫壞岸Kuei-Ann Wen電子研究所 關鍵字: 二維轉換;餘弦轉換;正弦轉換;分散算術;查表法;分割相加;;2D transform;cosine;sine;distributed;table look-up;algorithm; paritial sum 公開日期: 1992 摘要: 二維轉換在數位影像處理有很多的應用，本論文推出一種可程式化的二維 轉換結構，經由輸入適當的係數之後，可以執行所有的二維直交轉換。利 用以分散算術為基礎的查表法來設計電路，不需要使用任何乘法器。至於 在許多快速演算法中所採用的蝴蝶式架構，因其隨轉換之不同而異，且會 造成不規則的結構以及複雜的繞線因而佔掉許多面積，所以不予採用。分 割相加的技巧用來減低所需的記憶體總數，使得整個架 可以容納在一晶 片中。本電路採用１．２微米製程，電路模擬結果顯示其處理速度可至４ ０ＭＨｚ。 2D transforms have many applications in digital image processing. In this thesis a programmable 2D transform processor is presented. By properly load into the transform coefficients, one can compute all kinds of 2D orthogonal transoforms. Via table look-up algorithm which is based on distributed arithmetic, no multipliers are needed. Since the butterfly stages using in most fast algorithms depends on the type of transform and result in an irregular structure and the complicated routing requires large silicon area, we abandon this structure in our design. The partial sum technique reduce the number of needed memories, make it possible to realize the processor in a chip. Under 1.2 micro meter technology, the simulation shows that this processor can work at the speed of 40 MHz. URI: http://140.113.39.130/cdrfb3/record/nctu/#NT810430091http://hdl.handle.net/11536/56956 Appears in Collections: Thesis