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dc.contributor.authorHsu, Jenchienen_US
dc.contributor.authorSu, Chauchinen_US
dc.date.accessioned2014-12-08T15:07:08Z-
dc.date.available2014-12-08T15:07:08Z-
dc.date.issued2010-04-01en_US
dc.identifier.issn0018-9456en_US
dc.identifier.urihttp://dx.doi.org/10.1109/TIM.2009.2025992en_US
dc.identifier.urihttp://hdl.handle.net/11536/5601-
dc.description.abstractThis paper presents a built-in jitter measurement approach for measuring the timing jitter of spread-spectrum clocks (SSCs) and a jitter estimation method for validating the approach. Because of the lack of dedicated measurement instruments for SSC timing jitter measurement, the jitter estimation method is proposed to correlate SSC and non-SSC jitter. A 1.2-GHz eight-phase SSC generator with the jitter measurement circuit is designed and fabricated using the 0.18-mu m complementary metal-oxide semiconductor technology. The measured results are validated by the proposed estimation method, which is the key contribution of this paper. The experimental results show that the proposed built-in measurement approach has an error of less than 0.0026 UI.en_US
dc.language.isoen_USen_US
dc.subjectAnalog testingen_US
dc.subjectbuilt-in self testen_US
dc.subjectjitteren_US
dc.subjectjitter measurementen_US
dc.subjectphase-locked loop (PLL)en_US
dc.subjectspread-spectrum clock (SSCs)en_US
dc.titleTiming Jitter and Modulation Profile Extraction for Spread-Spectrum Clocksen_US
dc.typeArticleen_US
dc.identifier.doi10.1109/TIM.2009.2025992en_US
dc.identifier.journalIEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENTen_US
dc.citation.volume59en_US
dc.citation.issue4en_US
dc.citation.spage847en_US
dc.citation.epage856en_US
dc.contributor.department電控工程研究所zh_TW
dc.contributor.departmentInstitute of Electrical and Control Engineeringen_US
dc.identifier.wosnumberWOS:000275368500012-
dc.citation.woscount2-
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