標題: Improving Flash Translation Layer Performance by Supporting Large Superblocks
作者: Lin, Pei-Kuan
Chiao, Mong-Ling
Chang, Da-Wei
資訊工程學系
Department of Computer Science
關鍵字: NAND flash memory;flash translation layer;spare area management;storage management
公開日期: 1-五月-2010
摘要: A Flash Translation Layer (FTL) provides a block device interface on top of flash memory to support existing disk based file systems. Due to the erase-before-write feature of flash memory, an FTL usually performs out-of-place updates and uses a garbage collection procedure to reclaim stale data. Superblock FTL is one of the well-known FTLs, which achieves good performance in terms of both garbage collection overhead and RAM usage. The use of fine-grained mapping information allows a logical page within a superblock, i.e., a set of contiguous logical blocks, to be placed at any page offset of the physical blocks allocated for that superblock. In addition, the fine-grained mapping information is stored in the spare area of NAND flash memory to reduce the RAM usage. Generally, the FTL performance improves with larger superblocks. However, the spare area management approach of the FTL prevents it from supporting large superblocks. In this paper, we propose an FTL that incorporates a novel spare area management approach to enable the support of large superblocks. The simulation results from four traces show that the proposed FTL reduces the garbage collection overhead by up to 89%, when compared to the Superblock FTL. In addition, it results in shorter response time(1).
URI: http://dx.doi.org/10.1109/TCE.2010.5505982
http://hdl.handle.net/11536/5435
ISSN: 0098-3063
DOI: 10.1109/TCE.2010.5505982
期刊: IEEE TRANSACTIONS ON CONSUMER ELECTRONICS
Volume: 56
Issue: 2
起始頁: 642
結束頁: 650
顯示於類別:期刊論文


文件中的檔案:

  1. 000281747600055.pdf