標題: An optimal silicidation technique for electrostatic discharge protection sub-100 nm CMOS devices in VLSI circuit
作者: Yu, Shao-Ming
Lee, Jam-Wen
Li, Yiming
資訊工程學系
電信工程研究所
Department of Computer Science
Institute of Communications Engineering
關鍵字: electrostatic discharge;silicide;nanoscale device;VLSI circuit;system-on-a-chip;modeling;simulation;optimization
公開日期: 1-二月-2007
摘要: In this paper we propose a silicide design consideration for electrostatic discharge (ESD) protection in nanoscale CMOS devices. According to our practical implementation, it is found that a comprehensive silicide optimization can be achieved on the gate, drain, and source sides with very few testkey designs. Our study shows that there is a high characteristic efficiency for various conditions in particular, for optimizing the performance of sub-100 nm complementary metal-oxide-semiconductor devices in system-on-a-chip era. (c) 2006 Elsevier B.V. All rights reserved.
URI: http://dx.doi.org/10.1016/j.mee.2006.02.006
http://hdl.handle.net/11536/5290
ISSN: 0167-9317
DOI: 10.1016/j.mee.2006.02.006
期刊: MICROELECTRONIC ENGINEERING
Volume: 84
Issue: 2
起始頁: 213
結束頁: 217
顯示於類別:會議論文


文件中的檔案:

  1. 000244383000004.pdf