標題: On-chip memory module designs for video-signal processing
作者: Chang, TS
Jen, CW
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
關鍵字: video-signal processing;on-chip memory designs
公開日期: 1-六月-1997
摘要: Two embedded memory designs are proposed for video-signal processing. Concurrent line access performs multiple-port memory accesses at the hardware cost and access time of a single port. It uses 62.24% of the area required by a conventional dual-port memory and is only 7.6% larger than a single-port 2K x 8 memory. The block-access mode combines address decoders and generators, yielding block-access mode times 26% faster than conventional schemes for a 256 words x 32 bits memory size. Despite some preferred-access-order restrictions, the designs incur no loss of generality because video algorithms possess high data parallelism and low dependence.
URI: http://hdl.handle.net/11536/520
ISSN: 1350-2409
期刊: IEE PROCEEDINGS-CIRCUITS DEVICES AND SYSTEMS
Volume: 144
Issue: 3
起始頁: 138
結束頁: 144
顯示於類別:期刊論文


文件中的檔案:

  1. A1997XH17300002.pdf