標題: 原子層沉積三氧化二鋁介電層於砷化銦鎵金氧半電容之電性與化性的研究
Study on Electrical and Chemical Characteristics of Indium Gallium Arsenide Metal-Oxide-Semiconductor Capacitors with Atomic-Layer-Deposited Al2O3 Gate Dielectric
作者: 鄒秉翰
Tsou, Ping-Han
簡昭欣
Chien, Chao-Hsin
電子工程學系 電子研究所
關鍵字: 砷化銦鎵;原子層沉積;三氧化二鋁;Indium Gallium Arsenide;Atomic-Layer-Deposited;Aluminium oxide
公開日期: 2012
摘要: 在此篇論文初,我們主要研究晶向(100)的砷化銦鎵通道層與三氧化二鋁(原子層沉積,ALD)之間的界面。粗劣的界面和氧化層品質會導致高頻率分散、費米能階釘札及高閘極漏電流。為了要改善界面與閘極氧化層間的品質,不同的熱處理作用在電容上,例如:後金屬化退火(PMA)、氮氫混合氣體退火(FGA)、後沉積退火(PDA)。首先,我們先探討電容經過PMA的處理與FGA處理後的差異。與PMA相比,在聚積區的頻率分散可被FGA有效地降低。另外,我們利用電導法來萃取界面缺陷電荷密度(Dit);在能隙深處(midgap)的缺陷電荷經過FGA後可被輕微地降低,例如:Dit (Et= 0.428 eV)在FGA後降低約22.28%。其後,電容在FGA下與不同PDA的效應也已探討。從量測的數據分析指出電容在PDA溫度500度120秒及FGA下展現最差的電性。此外,越高的PDA溫度,越高的Dit存在於能隙深處。電性之所以劣化的原因,從XPS分析來看為較低的三氧化二砷與五氧化二砷比值(As2O3/As2O5)及砷化物的析出。接著,在我們的實驗中,晶向(100)砷化銦鎵的電性較優於晶向(111)A砷化銦鎵的電性,如較低的頻率分散和較低的Dit。這個結果可能是因為相較於三氧化二鋁和晶向(111)A砷化銦鎵間的界面,有較高的As2O3/As2O5於三氧化二鋁和晶向(100)砷化銦鎵間的界面。 最後,根據TEM影像和EDX分析,自我對準鎳-砷化銦鎵合金之源極/汲極之n型通道金氧半場效電晶體的失敗原因歸因於鎳-砷化銦鎵合金的未形成。其中,最有可能阻礙鎳-砷化銦鎵合金形成的原因為原生氧化層存在於鎳與砷化銦鎵通道層間。
In the beginning of the thesis, we have mainly studied the interface between (100)-oriented In0.53Ga0.47As channel layer and Al2O3 (atomic layer deposition, ALD). Poor interface and oxide qualities may cause high frequency dispersion, Fermi level pinning, and high gate leakage current. In order to improve interface and gate oxide qualities, different thermal treatments are applied to the capacitors, such as post-metallization annealing (PMA), forming gas annealing (FGA), and post deposition annealing (PDA). Firstly, we study the difference between the capacitors treated with PMA and those treated with FAG. Compared to PMA, frequency dispersion in accumulation can be efficiently reduced by FGA. In addition, we utilize the conductance method to extract the interface state density (Dit). The midgap traps can be slightly reduced: for instance, Dit (Et= 0.428 eV) decreases about 22.28% after FGA. Subsequently, the effects of MOSCAPs under different PDA temperature with FGA have also been discussed. It is noted that MOSCAPs under PDA 500 oC for 120 s with FGA show the worst electrical characteristics. Furthermore, higher PDA temperature is, the higher Dit exists close to midgap. The reason for the degradation of electrical characteristics may be lower ratio of As2O3 to As2O5 and the precipitation of arsenide, which is shown in our XPS analysis. Next, in our experiment, the electrical characteristics of In0.53Ga0.47As (100) is better than In0.53Ga0.47As (111)A, such as lower frequency dispersion and lower Dit. This consequence is possibly due to higher amounts of As2O3/As2O5 at the Al2O¬3/In0.53Ga0.47As (100) interface, compared to Al2O¬3/In0.53Ga0.47As (111)A interface. Eventually, the failure of self-aligned Ni-InGaAs S/D In0.53Ga0.47As n-MOSFETs is attributed to the non-formation of Ni-InGaAs according to the TEM image and EDX analysis. The possible reason that inhibits the formation of Ni-InGaAs may the existence of native oxides between Ni and In0.53Ga¬0.47As channel layer.
URI: http://140.113.39.130/cdrfb3/record/nctu/#GT079911514
http://hdl.handle.net/11536/49061
Appears in Collections:Thesis


Files in This Item:

  1. 151401.pdf