Capacity planning during production ramp-up stage
|關鍵字:||Ramp-up;良率學習;產能分配;Ramp-up;Yield learning;Capacity planning|
Continuous production process improvement is an important issue in semiconductor companies. The smaller line width of production process is, the more numbers of chip per wafer are. Therefore semiconductor companies continuously introduce new production processes to reduce line width that cuts the chip unit cost down. However, semiconductor companies face with rapid product lifecycles and competitive pressure. A new production process is frequently introduced into a production line when it is ill understood. The yield of new production process is very low and unstable that causes a lot of wafer waste. For meeting customer demands, current and new production processes are frequently existed simultaneously in production line at production ramp-up stage. In this study we assume yield learning of new production process during ramp-up stage is determined by two factors. One is learning-by-doing, and the other is learning-by-experiment. We suppose the two factors are defined by the number of released lots of new production process. In this study we consider the constraints of capacity and customer demands we formulate a mathematical model to determine the released lots of new and current production for minimize raw wafer costs and holding cost. We also perform sensitivity analysis of parameters of learning function and per raw wafer cost for some management insights.
|Appears in Collections:||Thesis|